{"id":"CVE-2019-0184","aliases":["EUVD-2019-0991","GHSA-2fcv-44qv-q3qw"],"status":"published","title":"Insufficient access control in protected memory subsystem for Intel(R) TXT for 6th, 7th, 8th and...","description":"Insufficient access control in protected memory subsystem for Intel(R) TXT for 6th, 7th, 8th and 9th Generation Intel(R) Core(TM) Processor Families; Intel(R) Xeon(R) Processor E3-1500 v5 and v6 Families; Intel(R) Xeon(R) E-2100 and E-2200 Processor Families with Intel(R) Processor Graphics and Intel(R) TXT may allow a privileged user to potentially enable information disclosure via local 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Advisory"]},{"url":"https://support.f5.com/csp/article/K41556648?utm_source=f5support\u0026amp%3Butm_medium=RSS","tags":["x_refsource_CONFIRM","x_transferred"]},{"url":"https://nvd.nist.gov/vuln/detail/CVE-2019-0184"},{"url":"https://support.f5.com/csp/article/K41556648?utm_source=f5support\u0026amp;utm_medium=RSS"},{"url":"https://github.com/advisories/GHSA-2fcv-44qv-q3qw"}],"sources":{"cve":[{"id":"CVE-2019-0184","description":"Insufficient access control in protected memory subsystem for Intel(R) TXT for 6th, 7th, 8th and 9th Generation Intel(R) Core(TM) Processor Families; Intel(R) Xeon(R) Processor E3-1500 v5 and v6 Families; Intel(R) Xeon(R) E-2100 and E-2200 Processor Families with Intel(R) Processor Graphics and Intel(R) TXT may allow a privileged user to potentially enable information disclosure via local access.","status":"published","published":"2019-11-14T19:09:12Z","modified":"2024-08-04T17:44:14.7Z","updated_at":"2026-11-02T14:32:24.110857Z"}],"euvd":[{"id":"EUVD-2019-0991","description":"Insufficient access control in protected memory subsystem for Intel(R) TXT for 6th, 7th, 8th and 9th Generation Intel(R) Core(TM) Processor Families; Intel(R) Xeon(R) Processor E3-1500 v5 and v6 Families; Intel(R) Xeon(R) E-2100 and E-2200 Processor Families with Intel(R) Processor Graphics and Intel(R) TXT may allow a privileged user to potentially enable information disclosure via local access.","status":"published","published":"2019-11-14T19:09:12Z","modified":"2024-08-04T17:44:14Z","updated_at":"2026-11-03T03:07:02.049822Z"}],"ghsa":[{"id":"GHSA-2fcv-44qv-q3qw","title":"Insufficient access control in protected memory subsystem for Intel(R) TXT for 6th, 7th, 8th and...","description":"Insufficient access control in protected memory subsystem for Intel(R) TXT for 6th, 7th, 8th and 9th Generation Intel(R) Core(TM) Processor Families; Intel(R) Xeon(R) Processor E3-1500 v5 and v6 Families; Intel(R) Xeon(R) E-2100 and E-2200 Processor Families with Intel(R) Processor Graphics and Intel(R) TXT may allow a privileged user to potentially enable information disclosure via local access.","status":"published","published":"2022-05-24T17:00:55Z","modified":"2023-01-28T05:08:14Z","updated_at":"2026-11-02T14:44:36.474417Z"}],"nvd":[{"id":"CVE-2019-0184","description":"Insufficient access control in protected memory subsystem for Intel(R) TXT for 6th, 7th, 8th and 9th Generation Intel(R) Core(TM) Processor Families; Intel(R) Xeon(R) Processor E3-1500 v5 and v6 Families; Intel(R) Xeon(R) E-2100 and E-2200 Processor Families with Intel(R) Processor Graphics and Intel(R) TXT may allow a privileged user to potentially enable information disclosure via local access.","status":"published","published":"2019-11-14T20:15:11.617Z","modified":"2026-06-17T02:07:53.707Z","cvss":[{"version":"3.1","score":5.5,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N","level":"medium","assessor":"primary"},{"version":"2.0","score":2.1,"vector":"AV:L/AC:L/Au:N/C:P/I:N/A:N","level":"low","assessor":"primary"}],"updated_at":"2026-11-02T14:05:37.024431Z"}]}}