{"id":"CVE-2022-42336","aliases":["ALPINE-CVE-2022-42336","DEBIAN-CVE-2022-42336","EUVD-2022-45411","GHSA-79pv-m8fc-mhfj","MGASA-2024-0047","SUSE-SU-2023:2535-1","UBUNTU-CVE-2022-42336","openSUSE-SU-2024:12959-1"],"status":"published","title":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family...","description":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.","severity":{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low","assessor":"primary","from":"nvd"},"epss":{"day":"2026-11-10","score":0.00266,"percentile":0.18655,"model":"v2026.06.15"},"facts":{"in_kev":false,"known_exploited":false,"public_exploit":false,"fix_available":true},"published":"2023-05-17T00:00:00Z","modified":"2026-11-03T08:03:55Z","fixes":[{"ecosystem":"Alpine:v3.18","package":"xen","fixed_in":["4.17.1-r1"],"sources":["osv"]},{"ecosystem":"Alpine:v3.19","package":"xen","fixed_in":["4.17.1-r1"],"sources":["osv"]},{"ecosystem":"Alpine:v3.20","package":"xen","fixed_in":["4.17.1-r1"],"sources":["osv"]},{"ecosystem":"Alpine:v3.21","package":"xen","fixed_in":["4.17.1-r1"],"sources":["osv"]},{"ecosystem":"Alpine:v3.22","package":"xen","fixed_in":["4.17.1-r1"],"sources":["osv"]},{"ecosystem":"Alpine:v3.23","package":"xen","fixed_in":["4.17.1-r1"],"sources":["osv"]},{"ecosystem":"Alpine:v3.24","package":"xen","fixed_in":["4.17.1-r1"],"sources":["osv"]},{"ecosystem":"Debian:12","package":"xen","fixed_in":["4.17.1+2-gb773c48e36-1"],"sources":["osv"]},{"ecosystem":"Debian:13","package":"xen","fixed_in":["4.17.1+2-gb773c48e36-1"],"sources":["osv"]},{"ecosystem":"Debian:14","package":"xen","fixed_in":["4.17.1+2-gb773c48e36-1"],"sources":["osv"]},{"ecosystem":"openSUSE:Tumbleweed","package":"xen","fixed_in":["4.17.1_04-1.1"],"sources":["osv"]}],"affected":[{"source":"osv","ecosystem":"Alpine:v3.18","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1-r1"}]}]},{"source":"osv","ecosystem":"Alpine:v3.19","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1-r1"}]}]},{"source":"osv","ecosystem":"Alpine:v3.20","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1-r1"}]}]},{"source":"osv","ecosystem":"Alpine:v3.21","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1-r1"}]}]},{"source":"osv","ecosystem":"Alpine:v3.22","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1-r1"}]}]},{"source":"osv","ecosystem":"Alpine:v3.23","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1-r1"}]}]},{"source":"osv","ecosystem":"Alpine:v3.24","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1-r1"}]}]},{"source":"osv","ecosystem":"Debian:12","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1+2-gb773c48e36-1"}]}]},{"source":"osv","ecosystem":"Debian:13","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1+2-gb773c48e36-1"}]}]},{"source":"osv","ecosystem":"Debian:14","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1+2-gb773c48e36-1"}]}]},{"source":"osv","ecosystem":"Mageia:9","package":"qemu","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"7.2.9-1.mga9"}]}],"bundled":4},{"source":"osv","ecosystem":"Mageia:9","package":"libvirt","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"9.6.0-1.mga9"}]}],"bundled":4},{"source":"osv","ecosystem":"Mageia:9","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.3-1.mga9"}]}],"bundled":4},{"source":"osv","ecosystem":"SUSE:Linux Enterprise Module for Basesystem 15 SP5","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1_04-150500.3.3.1"}]}],"bundled":2},{"source":"osv","ecosystem":"SUSE:Linux Enterprise Module for Server Applications 15 SP5","package":"xen","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4.17.1_04-150500.3.3.1"}]}],"bundled":2},{"source":"osv","ecosystem":"openSUSE:Leap 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Advisory","advisory"]},{"url":"https://lists.fedoraproject.org/archives/list/package-announce%40lists.fedoraproject.org/message/LTO3U3WYLAZW3KLPKJZ332FYUREXPZMQ/","tags":["vendor-advisory","x_transferred","web"]},{"url":"http://xenbits.xen.org/xsa/advisory-431.html","tags":["advisory"]},{"url":"https://nvd.nist.gov/vuln/detail/CVE-2022-42336"},{"url":"https://lists.fedoraproject.org/archives/list/package-announce%40lists.fedoraproject.org/message/LTO3U3WYLAZW3KLPKJZ332FYUREXPZMQ"},{"url":"https://lists.fedoraproject.org/archives/list/package-announce@lists.fedoraproject.org/message/LTO3U3WYLAZW3KLPKJZ332FYUREXPZMQ"},{"url":"https://github.com/advisories/GHSA-79pv-m8fc-mhfj"},{"url":"https://security.alpinelinux.org/vuln/CVE-2022-42336","tags":["advisory"]},{"url":"https://security-tracker.debian.org/tracker/CVE-2022-42336","tags":["advisory"]},{"url":"https://advisories.mageia.org/MGASA-2024-0047.html","tags":["advisory"]},{"url":"https://bugs.mageia.org/show_bug.cgi?id=32332","tags":["report"]},{"url":"https://xenbits.xen.org/xsa/advisory-431.html","tags":["advisory","report"]},{"url":"https://xenbits.xen.org/xsa/advisory-449.html","tags":["advisory"]},{"url":"https://xenbits.xen.org/xsa/advisory-450.html","tags":["advisory"]},{"url":"https://www.suse.com/support/update/announcement/2023/suse-su-20232535-1/","tags":["advisory"]},{"url":"https://bugzilla.suse.com/1027519","tags":["report"]},{"url":"https://bugzilla.suse.com/1208736","tags":["report"]},{"url":"https://bugzilla.suse.com/1209237","tags":["report"]},{"url":"https://bugzilla.suse.com/1209245","tags":["report"]},{"url":"https://bugzilla.suse.com/1210315","tags":["report"]},{"url":"https://bugzilla.suse.com/1210570","tags":["report"]},{"url":"https://bugzilla.suse.com/1211433","tags":["report"]},{"url":"https://www.suse.com/security/cve/CVE-2022-42335","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2022-42336","tags":["web"]},{"url":"https://ubuntu.com/security/CVE-2022-42336","tags":["report"]},{"url":"https://www.openwall.com/lists/oss-security/2023/05/16/5","tags":["report"]},{"url":"https://www.cve.org/CVERecord?id=CVE-2022-42336","tags":["report"]},{"url":"","tags":["advisory"]}],"sources":{"cve":[{"id":"CVE-2022-42336","description":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.","status":"published","published":"2023-05-17T00:00:00Z","modified":"2025-01-22T20:08:06.226Z","cvss":[{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low","assessor":"adp"}],"updated_at":"2026-11-02T14:34:27.327929Z"}],"euvd":[{"id":"EUVD-2022-45411","description":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.","status":"published","published":"2023-05-17T00:00:00Z","modified":"2025-01-22T20:08:06Z","cvss":[{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low"}],"updated_at":"2026-11-03T00:04:15.37855Z"}],"ghsa":[{"id":"GHSA-79pv-m8fc-mhfj","title":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family...","description":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.","status":"published","published":"2023-05-17T03:30:16Z","modified":"2025-01-22T21:31:58Z","cvss":[{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low"}],"updated_at":"2026-11-02T14:59:38.594977Z"}],"nvd":[{"id":"CVE-2022-42336","description":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.","status":"published","published":"2023-05-17T01:15:09.48Z","modified":"2026-06-17T05:04:45.17Z","cvss":[{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low","assessor":"primary"},{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low","assessor":"secondary"}],"updated_at":"2026-11-02T14:07:37.42466Z"}],"osv":[{"id":"ALPINE-CVE-2022-42336","description":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.","status":"published","published":"2023-05-17T01:15:09.48Z","modified":"2026-11-03T07:18:33.752238979Z","cvss":[{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low"}],"updated_at":"2026-11-03T07:50:38.973973Z"},{"id":"CVE-2022-42336","description":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.","status":"published","published":"2023-05-17T01:15:09.48Z","modified":"2026-04-16T04:38:30.131968972Z","cvss":[{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low"}],"updated_at":"2026-11-02T15:44:27.186787Z"},{"id":"DEBIAN-CVE-2022-42336","description":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.","status":"published","published":"2023-05-17T01:15:09.48Z","modified":"2026-11-03T08:03:55.374821448Z","cvss":[{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low"}],"updated_at":"2026-11-03T08:23:34.488036Z"},{"id":"UBUNTU-CVE-2022-42336","description":"Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.","status":"published","published":"2023-05-17T01:15:00Z","modified":"2026-10-17T12:56:18.39100447Z","cvss":[{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low"},{"version":"3.1","score":3.3,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N","level":"low"}],"updated_at":"2026-11-02T16:53:55.502114Z"},{"id":"MGASA-2024-0047","title":"Updated xen, qemu and libvirt packages fix security vulnerabilities","description":"This update fixes several security issues and also improves stability.\n","status":"published","published":"2024-02-24T22:51:43Z","modified":"2026-04-16T04:44:23.384250046Z","updated_at":"2026-11-02T15:49:42.684501Z"},{"id":"openSUSE-SU-2024:12959-1","title":"xen-4.17.1_04-1.1 on GA media","description":"These are all security issues fixed in the xen-4.17.1_04-1.1 package on the GA media of openSUSE Tumbleweed.","status":"published","published":"2024-06-15T00:00:00Z","modified":"2026-02-04T02:39:02.0184Z","updated_at":"2026-11-02T16:58:36.025801Z"},{"id":"SUSE-SU-2023:2535-1","title":"Security update for xen","description":"This update for xen fixes the following issues:\n\nSecurity fixes:\n\n- CVE-2022-42336: Fix an issue where guests configuring AMD\n  Speculative Store Bypass Disable would have no effect (XSA-431)\n  (bsc#1211433).\n- CVE-2022-42335: Fixed an issue where guests running under shadow\n  mode with a PCI devices passed through could force the hypervisor\n  to dereference arbitrary memory, leading to a denial of service\n  (XSA-430) (bsc#1210315).\n\nNon-security fixes:\n\n- Fixed a build warning false positive (bsc#1210570).\n- Added missing debug-info to xen-syms (bsc#1209237).\n- Updated to version 4.17.1 (bsc#1027519).\n- Fixed a failure during VM destruction when using host-assisted kexec\n  and kdump (bsc#1209245).\n- Other upstream fixes (bsc#1027519).\n","status":"published","published":"2023-06-19T07:52:01Z","modified":"2025-05-02T04:33:42.170801Z","updated_at":"2026-11-02T15:53:53.019382Z"}]}}