{"id":"CVE-2023-23583","aliases":["ALPINE-CVE-2023-23583","BELL-CVE-2023-23583","CLSA-2023-1701444720","CLSA-2023-1701971779","CLSA-2023-1702324685","CLSA-2023-1702324842","CLSA-2023-1702420529","CLSA-2023-1702420635","CLSA-2023-1702420812","CLSA-2023-1702421029","DEBIAN-CVE-2023-23583","DLA-3690-1","DSA-5563-1","EUVD-2023-27683","GHSA-9cgg-v86h-hw54","MGASA-2024-0028","OESA-2023-1855","SUSE-SU-2023:4440-1","SUSE-SU-2023:4441-1","SUSE-SU-2023:4442-1","SUSE-SU-2023:4493-1","SUSE-SU-2023:4500-1","SUSE-SU-2023:4510-1","SUSE-SU-2025:1032-1","UBUNTU-CVE-2023-23583","USN-6485-1","openSUSE-SU-2024:13434-1","openSUSE-SU-2026:11242-1"],"status":"published","title":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may...","description":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of 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www.suse.com/security/cve/CVE-2024-37020","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2024-39355","tags":["web"]},{"url":"https://ubuntu.com/security/CVE-2023-23583","tags":["report"]},{"url":"https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/redundant-prefix-issue.html","tags":["report"]},{"url":"https://www.openwall.com/lists/oss-security/2023/11/14/4","tags":["report"]},{"url":"https://lock.cmpxchg8b.com/reptar.html","tags":["report"]},{"url":"https://ubuntu.com/security/notices/USN-6485-1","tags":["advisory"]},{"url":"https://www.cve.org/CVERecord?id=CVE-2023-23583","tags":["report"]},{"url":"","tags":["advisory"]},{"url":"https://www.suse.com/security/cve/CVE-2017-5715","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2017-5753","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2018-3615","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2018-3620","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2018-3640","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2019-11157","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2020-0543","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2020-12965","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2020-8694","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2021-26318","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2022-21123","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2022-29900","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2022-29901","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2023-20569","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2023-20588","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2023-31315","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2024-28956","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2024-36350","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2024-45332","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2024-56161","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2024-7881","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2025-20623","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2025-24495","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2025-29943","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2025-40300","tags":["web"]},{"url":"https://www.suse.com/security/cve/CVE-2025-54505","tags":["web"]}],"sources":{"cve":[{"id":"CVE-2023-23583","description":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.","status":"published","published":"2023-11-14T19:04:24.927Z","modified":"2025-12-16T18:23:24.391Z","cvss":[{"version":"3.1","score":8.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high","assessor":"cna"}],"cwes":["CWE-1281","CWE-276"],"updated_at":"2026-11-02T14:35:21.232549Z"}],"euvd":[{"id":"EUVD-2023-27683","description":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.","status":"published","published":"2023-11-14T19:04:24Z","modified":"2025-12-16T18:23:24Z","cvss":[{"version":"3.1","score":8.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high"}],"updated_at":"2026-11-02T19:49:04.015486Z"}],"ghsa":[{"id":"GHSA-9cgg-v86h-hw54","title":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may...","description":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.","status":"published","published":"2023-11-14T21:31:01Z","modified":"2025-01-08T00:31:50Z","cvss":[{"version":"3.1","score":8.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high"}],"cwes":["CWE-276","CWE-1281"],"updated_at":"2026-11-02T14:59:25.155575Z"}],"nvd":[{"id":"CVE-2023-23583","description":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.","status":"published","published":"2023-11-14T19:15:18.113Z","modified":"2026-06-17T05:37:30.33Z","cvss":[{"version":"3.1","score":8.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high","assessor":"secondary"},{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H","level":"high","assessor":"primary"}],"cwes":["CWE-1281","CWE-276"],"updated_at":"2026-11-02T14:08:46.647045Z"}],"osv":[{"id":"ALPINE-CVE-2023-23583","description":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.","status":"published","published":"2023-11-14T19:15:18.113Z","modified":"2026-10-26T17:17:58.60788465Z","cvss":[{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H","level":"high"}],"updated_at":"2026-11-02T15:27:49.202584Z"},{"id":"BELL-CVE-2023-23583","status":"published","published":"2023-11-14T19:15:00Z","modified":"2026-01-26T09:33:12.956757Z","cvss":[{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H","level":"high"}],"updated_at":"2026-11-02T15:28:17.742221Z"},{"id":"CVE-2023-23583","description":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.","status":"published","published":"2023-11-14T19:15:18.113Z","modified":"2026-07-10T10:14:35.987334255Z","cvss":[{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H","level":"high"}],"updated_at":"2026-11-02T15:44:30.709518Z"},{"id":"DEBIAN-CVE-2023-23583","description":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.","status":"published","published":"2023-11-14T19:15:18.113Z","modified":"2026-10-26T18:00:33.012505147Z","cvss":[{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H","level":"high"}],"updated_at":"2026-11-02T15:45:39.369204Z"},{"id":"OESA-2023-1855","title":"microcode_ctl security update","description":"This is a tool to transform and deploy microcode update for x86 CPUs.\r\n\r\nSecurity Fix(es):\r\n\r\nSequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.(CVE-2023-23583)","status":"published","published":"2023-11-24T11:06:18Z","modified":"2026-08-18T01:18:04.32670553Z","cvss":[{"version":"3.1","score":8.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high"}],"updated_at":"2026-11-02T15:52:40.71472Z"},{"id":"UBUNTU-CVE-2023-23583","description":"Sequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege and/or information disclosure and/or denial of service via local access.","status":"published","published":"2023-11-14T18:00:00Z","modified":"2026-02-04T02:19:52.184778Z","cvss":[{"version":"3.1","score":8.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high"},{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H","level":"high"}],"updated_at":"2026-11-02T16:54:20.198616Z"},{"id":"CLSA-2023-1701444720","title":"microcode_ctl: Fix of 4 CVEs","description":"- Update Intel CPU microcode to microcode-20231114 release, addresses\n  CVE-2022-40982 (INTEL-SA-00828), CVE-2022-41804 (INTEL-SA-00837),\n  CVE-2023-23908 (INTEL-SA-00836), CVE-2023-23583 (INTEL-SA-00950):\n  - Addition of 06-9a-04/0x40 microcode (in 06-9a-04) at revision 0x5;\n  - Addition of 06-ba-02/0xe0 microcode (in 06-ba-02) at revision 0x411c;\n  - Addition of 06-ba-02/0xe0 microcode (in 06-ba-02) at revision 0x411c;\n  - Addition of 06-ba-03/0xe0 microcode (in 06-ba-02) at revision 0x411c;\n  - Addition of 06-ba-02/0xe0 microcode (in 06-ba-03) at revision 0x411c;\n  - Addition of 06-ba-02/0xe0 microcode (in 06-ba-03) at revision 0x411c;\n  - Addition of 06-ba-03/0xe0 microcode (in 06-ba-03) at revision 0x411c;\n  - Addition of 06-be-00/0x11 microcode (in 06-be-00) at revision 0x12;\n  - Removal of 06-ba-02/0xc0 microcode (in 06-ba-02) at revision 0x410e;\n  - Removal of 06-ba-02/0xc0 microcode (in 06-ba-02) at revision 0x410e;\n  - Removal of 06-ba-03/0xc0 microcode (in 06-ba-02) at revision 0x410e;\n  - Removal of 06-ba-02/0xc0 microcode (in 06-ba-03) at revision 0x410e;\n  - Removal of 06-ba-02/0xc0 microcode (in 06-ba-03) at revision 0x410e;\n  - Removal of 06-ba-03/0xc0 microcode (in 06-ba-03) at revision 0x410e;\n  - Update of 06-55-03/0x97 (SKX-SP B1) microcode (in 06-55-03) from revision\n    0x1000161 up to 0x1000181;\n  - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in 06-55-04)\n    from revision 0x2006e05 up to 0x2007006;\n  - Update of 06-55-06/0xbf (CLX-SP B0) microcode (in 06-55-06) from revision\n    0x4003303 up to 0x4003604;\n  - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode (in 06-55-07) from\n    revision 0x5003303 up to 0x5003604;\n  - Update of 06-55-0b/0xbf (CPX-SP A1) microcode (in 06-55-0b) from revision\n    0x7002503 up to 0x7002703;\n  - Update of 06-6a-06/0x87 (ICX-SP D0) microcode (in 06-6a-06) from revision\n    0xd000389 up to 0xd0003b9;\n  - Update of 06-6c-01/0x10 (ICL-D B0) microcode (in 06-6c-01) from revision\n    0x1000211 up to 0x1000268;\n  - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode (in 06-7e-05) from revision\n    0xb8 up to 0xc2;\n  - Update of 06-8a-01/0x10 (LKF B2/B3) microcode (in 06-8a-01) from revision\n    0x32 up to 0x33;\n  - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in 06-8c-01) from\n    revision 0xa6 up to 0xb4;\n  - Update of 06-8c-02/0xc2 (TGL-R C0) microcode (in 06-8c-02) from revision\n    0x28 up to 0x34;\n  - Update of 06-8d-01/0xc2 (TGL-H R0) microcode (in 06-8d-01) from revision\n    0x42 up to 0x4e;\n  - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in 06-8e-09) from\n    revision 0xf0 up to 0xf4;\n  - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in 06-8e-09) from\n    revision 0xf0 up to 0xf4;\n  - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in 06-8e-0a)\n    from revision 0xf0 up to 0xf4;\n  - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in 06-8e-0b) from revision\n    0xf0 up to 0xf4;\n  - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode\n    (in 06-8e-0c) from revision 0xf4 up to 0xf8;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-04) from revision 0x2c000170 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-04) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-04) from revision\n    0x2c000170 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-04) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-04) from revision 0x2c000170 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-04) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-04) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000170;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000170;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at revision\n    0x2b000181;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at revision\n    0x2b000181;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-05) from revision 0x2c000170 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-05) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-05) from revision\n    0x2c000170 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-05) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-05) from revision 0x2c000170 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-05) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-05) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000170;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000170;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at revision\n    0x2b000181;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at revision\n    0x2b000181;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-06) from revision 0x2c000170 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-06) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-06) from revision\n    0x2c000170 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-06) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-06) from revision 0x2c000170 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-06) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-06) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000170;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000170;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at revision\n    0x2b000181;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at revision\n    0x2b000181;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-07) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-07) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-07) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-07) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at revision\n    0x2b000181;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at revision\n    0x2b000181;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-08) from revision 0x2c000170 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-08) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-08) from revision\n    0x2c000170 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-08) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-08) from revision 0x2c000170 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-08) from revision\n    0x2b000181 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-08) from\n    revision 0x2b000181 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000170;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000170;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at revision\n    0x2b000181;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at revision\n    0x2b000181;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x2c;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x2c;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-97-02) from\n    revision 0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-97-02) from revision 0x2c\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-97-02) from revision 0x2c\n    up to 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x2c;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x2c;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-97-05) from\n    revision 0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-97-05) from revision 0x2c\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-97-05) from revision 0x2c\n    up to 0x32;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x430;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x429;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x429;\n  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in 06-9a-03) from\n    revision 0x429 up to 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x430;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x429;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x429;\n  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in 06-9a-04) from\n    revision 0x429 up to 0x430;\n  - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in 06-9e-09)\n    from revision 0xf0 up to 0xf4;\n  - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in 06-9e-0a) from\n    revision 0xf0 up to 0xf4;\n  - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in 06-9e-0b) from\n    revision 0xf0 up to 0xf4;\n  - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in 06-9e-0c) from\n    revision 0xf0 up to 0xf4;\n  - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in 06-9e-0d) from\n    revision 0xf4 up to 0xfa;\n  - Update of 06-a5-02/0x20 (CML-H R1) microcode (in 06-a5-02) from revision\n    0xf4 up to 0xf8;\n  - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode (in 06-a5-03) from\n    revision 0xf4 up to 0xf8;\n  - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode (in 06-a5-05) from\n    revision 0xf4 up to 0xf8;\n  - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode (in 06-a6-00) from\n    revision 0xf4 up to 0xf8;\n  - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode (in 06-a6-01) from\n    revision 0xf4 up to 0xf8;\n  - Update of 06-a7-01/0x02 (RKL-S B0) microcode (in 06-a7-01) from revision\n    0x57 up to 0x5d;\n  - Update of 06-b7-01/0x32 (RPL-S S0) microcode (in 06-b7-01) from revision\n    0x112 up to 0x11d;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x2c;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x2c;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-bf-02) from\n    revision 0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-bf-02) from revision 0x2c\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-bf-02) from revision 0x2c\n    up to 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x2c;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x2c;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-bf-05) from\n    revision 0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-bf-05) from revision 0x2c\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-bf-05) from revision 0x2c\n    up to 0x32;\n- gen_update2.py was updated to output strings having restricted length.","status":"published","published":"2023-12-01T15:32:04Z","modified":"2026-10-21T10:47:53.326907019Z","updated_at":"2026-11-02T15:43:40.509998Z"},{"id":"CLSA-2023-1701971779","title":"microcode_ctl: Fix of CVE-2023-23583","description":"- Update Intel CPU microcode to microcode-20231114 release, addresses\n  CVE-2023-23583 (INTEL-SA-00950):\n  - Update of 06-6a-06/0x87 (ICX-SP D0) microcode (in 06-6a-06) from revision\n    0xd0003a5 up to 0xd0003b9;\n  - Update of 06-6c-01/0x10 (ICL-D B0) microcode (in 06-6c-01) from revision\n    0x1000230 up to 0x1000268;\n  - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode (in 06-7e-05) from revision\n    0xbc up to 0xc2;\n  - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in 06-8c-01) from\n    revision 0xac up to 0xb4;\n  - Update of 06-8c-02/0xc2 (TGL-R C0) microcode (in 06-8c-02) from revision\n    0x2c up to 0x34;\n  - Update of 06-8d-01/0xc2 (TGL-H R0) microcode (in 06-8d-01) from revision\n    0x46 up to 0x4e;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-04) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-04) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-04) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-04) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-04) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-04) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-04) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-05) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-05) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-05) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-05) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-05) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-05) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-05) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-06) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-06) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-06) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-06) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-06) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-06) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-06) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-07) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-07) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-07) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-07) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-08) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-08) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-08) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-08) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-08) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-08) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-08) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at revision\n    0x2b0004b1;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-97-02) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-97-02) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-97-02) from revision 0x2e\n    up to 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-97-05) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-97-05) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-97-05) from revision 0x2e\n    up to 0x32;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x430;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x42c;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x42c;\n  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in 06-9a-03) from\n    revision 0x42c up to 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x430;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x42c;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x42c;\n  - Update of 06-9a-04/0x40 (AZB A0) microcode (in 06-9a-04) from revision 0x4\n    up to 0x5;\n  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in 06-9a-04) from\n    revision 0x42c up to 0x430;\n  - Update of 06-a7-01/0x02 (RKL-S B0) microcode (in 06-a7-01) from revision\n    0x59 up to 0x5d;\n  - Update of 06-b7-01/0x32 (RPL-S B0) microcode (in 06-b7-01) from revision\n    0x119 up to 0x11d;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x411c;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x411c;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x4119;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x4119;\n  - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in 06-ba-02) from\n    revision 0x4119 up to 0x411c;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x411c;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x411c;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x4119;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x4119;\n  - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in 06-ba-03) from\n    revision 0x4119 up to 0x411c;\n  - Update of 06-be-00/0x11 (ADL-N A0) microcode (in 06-be-00) from revision\n    0x11 up to 0x12;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-bf-02) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-bf-02) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-bf-02) from revision 0x2e\n    up to 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-bf-05) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-bf-05) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-bf-05) from revision 0x2e\n    up to 0x32;\n- gen_update2.py was updated to output strings having restricted length;\n- refactor the way to keep the realeasenote.md file actual;","status":"published","published":"2023-12-07T17:56:23Z","modified":"2026-06-01T00:30:05.986343967Z","updated_at":"2026-11-02T15:43:40.88185Z"},{"id":"CLSA-2023-1702324685","title":"Fix CVE(s): CVE-2023-23583","description":"\n   * SECURITY UPDATE: New microcode data file 2023-11-14\n    - Updated microcodes:\n      sig 0x000606a6, pf_mask 0x87, 2023-09-01, rev 0xd0003b9, size 299008\n      sig 0x000606c1, pf_mask 0x10, 2023-09-08, rev 0x1000268, size 290816\n      sig 0x000706e5, pf_mask 0x80, 2023-09-03, rev 0x00c2, size 113664\n      sig 0x000806c1, pf_mask 0x80, 2023-09-07, rev 0x00b4, size 111616\n      sig 0x000806c2, pf_mask 0xc2, 2023-09-07, rev 0x0034, size 98304\n      sig 0x000806d1, pf_mask 0xc2, 2023-09-07, rev 0x004e, size 104448\n      sig 0x000806f4, pf_mask 0x10, 2023-06-26, rev 0x2c000290, size 605184\n      sig 0x000806f4, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x000806f5, pf_mask 0x10, 2023-06-26, rev 0x2c000290, size 605184\n      sig 0x000806f5, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x000806f6, pf_mask 0x10, 2023-06-26, rev 0x2c000290, size 605184\n      sig 0x000806f6, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x000806f7, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x000806f8, pf_mask 0x10, 2023-06-26, rev 0x2c000290, size 605184\n      sig 0x000806f8, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x00090672, pf_mask 0x07, 2023-06-07, rev 0x0032, size 222208\n      sig 0x00090675, pf_mask 0x07, 2023-06-07, rev 0x0032, size 222208\n      sig 0x000906a3, pf_mask 0x80, 2023-06-07, rev 0x0430, size 220160\n      sig 0x000906a4, pf_mask 0x40, 2023-05-05, rev 0x0005, size 117760\n      sig 0x000906a4, pf_mask 0x80, 2023-06-07, rev 0x0430, size 220160\n      sig 0x000a0671, pf_mask 0x02, 2023-09-03, rev 0x005d, size 104448\n      sig 0x000b0671, pf_mask 0x32, 2023-08-29, rev 0x011d, size 210944\n      sig 0x000b06a2, pf_mask 0xe0, 2023-08-30, rev 0x411c, size 216064\n      sig 0x000b06a3, pf_mask 0xe0, 2023-08-30, rev 0x411c, size 216064\n      sig 0x000b06e0, pf_mask 0x11, 2023-06-26, rev 0x0012, size 136192\n      sig 0x000b06f2, pf_mask 0x07, 2023-06-07, rev 0x0032, size 222208\n      sig 0x000b06f5, pf_mask 0x07, 2023-06-07, rev 0x0032, size 222208\n    - CVE-2023-23583, INTEL-SA-00950\n   * source: update symlinks to reflect id of the latest release, 20231114","status":"published","published":"2023-12-11T19:58:52Z","modified":"2026-06-04T10:03:53.469838Z","updated_at":"2026-11-02T15:43:40.88185Z"},{"id":"CLSA-2023-1702324842","title":"Fix CVE(s): CVE-2023-23583","description":"\n   * SECURITY UPDATE: New microcode data file 2023-11-14\n    - Updated microcodes:\n      sig 0x000606a6, pf_mask 0x87, 2023-09-01, rev 0xd0003b9, size 299008\n      sig 0x000606c1, pf_mask 0x10, 2023-09-08, rev 0x1000268, size 290816\n      sig 0x000706e5, pf_mask 0x80, 2023-09-03, rev 0x00c2, size 113664\n      sig 0x000806c1, pf_mask 0x80, 2023-09-07, rev 0x00b4, size 111616\n      sig 0x000806c2, pf_mask 0xc2, 2023-09-07, rev 0x0034, size 98304\n      sig 0x000806d1, pf_mask 0xc2, 2023-09-07, rev 0x004e, size 104448\n      sig 0x000806f4, pf_mask 0x10, 2023-06-26, rev 0x2c000290, size 605184\n      sig 0x000806f4, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x000806f5, pf_mask 0x10, 2023-06-26, rev 0x2c000290, size 605184\n      sig 0x000806f5, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x000806f6, pf_mask 0x10, 2023-06-26, rev 0x2c000290, size 605184\n      sig 0x000806f6, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x000806f7, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x000806f8, pf_mask 0x10, 2023-06-26, rev 0x2c000290, size 605184\n      sig 0x000806f8, pf_mask 0x87, 2023-06-16, rev 0x2b0004d0, size 572416\n      sig 0x00090672, pf_mask 0x07, 2023-06-07, rev 0x0032, size 222208\n      sig 0x00090675, pf_mask 0x07, 2023-06-07, rev 0x0032, size 222208\n      sig 0x000906a3, pf_mask 0x80, 2023-06-07, rev 0x0430, size 220160\n      sig 0x000906a4, pf_mask 0x40, 2023-05-05, rev 0x0005, size 117760\n      sig 0x000906a4, pf_mask 0x80, 2023-06-07, rev 0x0430, size 220160\n      sig 0x000a0671, pf_mask 0x02, 2023-09-03, rev 0x005d, size 104448\n      sig 0x000b0671, pf_mask 0x32, 2023-08-29, rev 0x011d, size 210944\n      sig 0x000b06a2, pf_mask 0xe0, 2023-08-30, rev 0x411c, size 216064\n      sig 0x000b06a3, pf_mask 0xe0, 2023-08-30, rev 0x411c, size 216064\n      sig 0x000b06e0, pf_mask 0x11, 2023-06-26, rev 0x0012, size 136192\n      sig 0x000b06f2, pf_mask 0x07, 2023-06-07, rev 0x0032, size 222208\n      sig 0x000b06f5, pf_mask 0x07, 2023-06-07, rev 0x0032, size 222208\n     - CVE-2023-23583, INTEL-SA-00950\n   * source: update symlinks to reflect id of the latest release, 20231114","status":"published","published":"2023-12-11T20:00:46Z","modified":"2026-06-04T10:04:15.924896Z","updated_at":"2026-11-02T15:43:40.88185Z"},{"id":"CLSA-2023-1702420529","title":"microcode_ctl: Fix of CVE-2023-23583","description":"- Update Intel CPU microcode to microcode-20231114 release, addresses\n  CVE-2023-23583 (INTEL-SA-00950):\n  - Update of 06-6a-06/0x87 (ICX-SP D0) microcode (in 06-6a-06) from revision\n    0xd0003a5 up to 0xd0003b9;\n  - Update of 06-6c-01/0x10 (ICL-D B0) microcode (in 06-6c-01) from revision\n    0x1000230 up to 0x1000268;\n  - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode (in 06-7e-05) from revision\n    0xbc up to 0xc2;\n  - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in 06-8c-01) from\n    revision 0xac up to 0xb4;\n  - Update of 06-8c-02/0xc2 (TGL-R C0) microcode (in 06-8c-02) from revision\n    0x2c up to 0x34;\n  - Update of 06-8d-01/0xc2 (TGL-H R0) microcode (in 06-8d-01) from revision\n    0x46 up to 0x4e;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-04) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-04) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-04) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-04) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-04) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-04) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-04) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-05) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-05) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-05) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-05) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-05) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-05) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-05) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-06) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-06) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-06) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-06) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-06) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-06) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-06) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-07) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-07) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-07) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-07) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-08) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-08) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-08) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-08) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-08) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-08) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-08) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at revision\n    0x2b0004b1;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-97-02) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-97-02) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-97-02) from revision 0x2e\n    up to 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-97-05) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-97-05) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-97-05) from revision 0x2e\n    up to 0x32;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x430;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x42c;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x42c;\n  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in 06-9a-03) from\n    revision 0x42c up to 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x430;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x42c;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x42c;\n  - Update of 06-9a-04/0x40 (AZB A0) microcode (in 06-9a-04) from revision 0x4\n    up to 0x5;\n  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in 06-9a-04) from\n    revision 0x42c up to 0x430;\n  - Update of 06-a7-01/0x02 (RKL-S B0) microcode (in 06-a7-01) from revision\n    0x59 up to 0x5d;\n  - Update of 06-b7-01/0x32 (RPL-S B0) microcode (in 06-b7-01) from revision\n    0x119 up to 0x11d;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x411c;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x411c;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x4119;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x4119;\n  - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in 06-ba-02) from\n    revision 0x4119 up to 0x411c;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x411c;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x411c;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x4119;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x4119;\n  - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in 06-ba-03) from\n    revision 0x4119 up to 0x411c;\n  - Update of 06-be-00/0x11 (ADL-N A0) microcode (in 06-be-00) from revision\n    0x11 up to 0x12;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-bf-02) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-bf-02) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-bf-02) from revision 0x2e\n    up to 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-bf-05) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-bf-05) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-bf-05) from revision 0x2e\n    up to 0x32.","status":"published","published":"2023-12-12T22:35:32Z","modified":"2026-06-01T00:33:25.012435865Z","updated_at":"2026-11-02T15:43:40.88185Z"},{"id":"CLSA-2023-1702420635","title":"microcode_ctl: Fix of CVE-2023-23583","description":"- Update Intel CPU microcode to microcode-20231114 release, addresses\n  CVE-2023-23583 (INTEL-SA-00950):\n  - Addition of 06-ba-02/0xe0 microcode at revision 0x411c;\n  - Addition of 06-ba-02/0xe0 microcode at revision 0x411c;\n  - Addition of 06-ba-03/0xe0 microcode (in intel-ucode/06-ba-02) at revision\n    0x411c;\n  - Addition of 06-ba-02/0xe0 microcode (in intel-ucode/06-ba-03) at revision\n    0x411c;\n  - Addition of 06-ba-02/0xe0 microcode (in intel-ucode/06-ba-03) at revision\n    0x411c;\n  - Addition of 06-ba-03/0xe0 microcode at revision 0x411c;\n  - Addition of 06-be-00/0x11 microcode at revision 0x12;\n  - Removal of 06-ba-02/0xc0 microcode at revision 0x4112;\n  - Removal of 06-ba-02/0xc0 microcode at revision 0x4112;\n  - Removal of 06-ba-03/0xc0 microcode (in intel-ucode/06-ba-02) at revision\n    0x4112;\n  - Removal of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at revision\n    0x4112;\n  - Removal of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at revision\n    0x4112;\n  - Removal of 06-ba-03/0xc0 microcode at revision 0x4112;\n  - Removal of 06-be-00/0x01 microcode at revision 0x10;\n  - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000171 up to\n    0x1000181;\n  - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision\n    0x2006f05 up to 0x2007006;\n  - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003501 up to\n    0x4003604;\n  - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision\n    0x5003501 up to 0x5003604;\n  - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002601 up to\n    0x7002703;\n  - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000390 up to\n    0xd0003b9;\n  - Update of 06-6c-01/0x10 microcode from revision 0x1000230 up to 0x1000268;\n  - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xba up to\n    0xc2;\n  - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision 0xaa up to\n    0xb4;\n  - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x2a up to 0x34;\n  - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x44 up to 0x4e;\n  - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xf2 up to\n    0xf4;\n  - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xf2\n    up to 0xf4;\n  - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision\n    0xf2 up to 0xf4;\n  - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xf2 up to 0xf4;\n  - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode\n    from revision 0xf6 up to 0xf8;\n  - Update of 06-8f-04/0x10 microcode from revision 0x2c0001d1 up to\n    0x2c000290;\n  - Update of 06-8f-04/0x87 microcode from revision 0x2b000461 up to\n    0x2b0004d0;\n  - Update of 06-8f-05/0x10 microcode (in intel-ucode/06-8f-04) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 microcode (in intel-ucode/06-8f-04) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-06/0x87 microcode (in intel-ucode/06-8f-04) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode (in intel-ucode/06-8f-04) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-04) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-04) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-04) at revision\n    0x2c0001d1;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-04) at revision\n    0x2c0001d1;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-04) at revision\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-04) at revision\n    0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-04) at revision\n    0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-04) at revision\n    0x2b000461;\n  - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-04/0x87 microcode (in intel-ucode/06-8f-05) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 microcode from revision 0x2c0001d1 up to\n    0x2c000290;\n  - Update of 06-8f-05/0x87 microcode from revision 0x2b000461 up to\n    0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-06/0x87 microcode (in intel-ucode/06-8f-05) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode (in intel-ucode/06-8f-05) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-05) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-05) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-05) at revision\n    0x2c0001d1;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-05) at revision\n    0x2c0001d1;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-05) at revision\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-05) at revision\n    0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-05) at revision\n    0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-05) at revision\n    0x2b000461;\n  - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-04/0x87 microcode (in intel-ucode/06-8f-06) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 microcode (in intel-ucode/06-8f-06) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 microcode (in intel-ucode/06-8f-06) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode from revision 0x2c0001d1 up to\n    0x2c000290;\n  - Update of 06-8f-06/0x87 microcode from revision 0x2b000461 up to\n    0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode (in intel-ucode/06-8f-06) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-06) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-06) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-06) at revision\n    0x2c0001d1;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-06) at revision\n    0x2c0001d1;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-06) at revision\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-06) at revision\n    0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-06) at revision\n    0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-06) at revision\n    0x2b000461;\n  - Update of 06-8f-04/0x87 microcode (in intel-ucode/06-8f-07) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x87 microcode (in intel-ucode/06-8f-07) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x87 microcode (in intel-ucode/06-8f-07) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode from revision 0x2b000461 up to\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-07) at revision\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-07) at revision\n    0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-07) at revision\n    0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-07) at revision\n    0x2b000461;\n  - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-04/0x87 microcode (in intel-ucode/06-8f-08) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 microcode (in intel-ucode/06-8f-08) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 microcode (in intel-ucode/06-8f-08) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-06/0x87 microcode (in intel-ucode/06-8f-08) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode (in intel-ucode/06-8f-08) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 microcode at revision 0x2c000290;\n  - Addition of 06-8f-08/0x10 microcode at revision 0x2c000290;\n  - Removal of 06-8f-08/0x10 microcode at revision 0x2c0001d1;\n  - Removal of 06-8f-08/0x10 microcode at revision 0x2c0001d1;\n  - Addition of 06-8f-08/0x87 microcode at revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode at revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode at revision 0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode at revision 0x2b000461;\n  - Addition of 06-97-02/0x07 microcode at revision 0x32;\n  - Addition of 06-97-02/0x07 microcode at revision 0x32;\n  - Removal of 06-97-02/0x07 microcode at revision 0x2c;\n  - Removal of 06-97-02/0x07 microcode at revision 0x2c;\n  - Update of 06-97-05/0x07 microcode (in intel-ucode/06-97-02) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 microcode (in intel-ucode/06-97-02) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-05/0x07 microcode (in intel-ucode/06-97-02) from revision\n    0x2c up to 0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-97-05) at revision\n    0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-97-05) at revision\n    0x32;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-97-05) at revision\n    0x2c;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-97-05) at revision\n    0x2c;\n  - Update of 06-97-05/0x07 microcode from revision 0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 microcode (in intel-ucode/06-97-05) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-05/0x07 microcode (in intel-ucode/06-97-05) from revision\n    0x2c up to 0x32;\n  - Addition of 06-9a-03/0x80 microcode at revision 0x430;\n  - Addition of 06-9a-03/0x80 microcode at revision 0x430;\n  - Removal of 06-9a-03/0x80 microcode at revision 0x42a;\n  - Removal of 06-9a-03/0x80 microcode at revision 0x42a;\n  - Update of 06-9a-04/0x80 microcode (in intel-ucode/06-9a-03) from revision\n    0x42a up to 0x430;\n  - Addition of 06-9a-03/0x80 microcode (in intel-ucode/06-9a-04) at revision\n    0x430;\n  - Addition of 06-9a-03/0x80 microcode (in intel-ucode/06-9a-04) at revision\n    0x430;\n  - Removal of 06-9a-03/0x80 microcode (in intel-ucode/06-9a-04) at revision\n    0x42a;\n  - Removal of 06-9a-03/0x80 microcode (in intel-ucode/06-9a-04) at revision\n    0x42a;\n  - Update of 06-9a-04/0x40 microcode from revision 0x4 up to 0x5;\n  - Update of 06-9a-04/0x80 microcode from revision 0x42a up to 0x430;\n  - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision\n    0xf2 up to 0xf4;\n  - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xf2 up\n    to 0xf4;\n  - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xf2 up to\n    0xf4;\n  - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xf2 up\n    to 0xf4;\n  - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xf8 up\n    to 0xfa;\n  - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf6 up to 0xf8;\n  - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf6 up to\n    0xf8;\n  - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf6 up to\n    0xf8;\n  - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf6 up to\n    0xf8;\n  - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xf6 up\n    to 0xf8;\n  - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x58 up to 0x5d;\n  - Update of 06-b7-01/0x32 microcode from revision 0x113 up to 0x11d;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-bf-02) at revision\n    0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-bf-02) at revision\n    0x32;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-bf-02) at revision\n    0x2c;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-bf-02) at revision\n    0x2c;\n  - Update of 06-97-05/0x07 microcode (in intel-ucode/06-bf-02) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 microcode from revision 0x2c up to 0x32;\n  - Update of 06-bf-05/0x07 microcode (in intel-ucode/06-bf-02) from revision\n    0x2c up to 0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-bf-05) at revision\n    0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-bf-05) at revision\n    0x32;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-bf-05) at revision\n    0x2c;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-bf-05) at revision\n    0x2c;\n  - Update of 06-97-05/0x07 microcode (in intel-ucode/06-bf-05) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 microcode (in intel-ucode/06-bf-05) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-05/0x07 microcode from revision 0x2c up to 0x32.","status":"published","published":"2023-12-12T22:37:19Z","modified":"2026-06-01T00:33:22.134505511Z","updated_at":"2026-11-02T15:43:40.88185Z"},{"id":"CLSA-2023-1702420812","title":"microcode_ctl: Fix of CVE-2023-23583","description":"- Update Intel CPU microcode to microcode-20231114 release, addresses\n  CVE-2023-23583 (INTEL-SA-00950):\n  - Addition of 06-ba-02/0xe0 microcode at revision 0x411c;\n  - Addition of 06-ba-02/0xe0 microcode at revision 0x411c;\n  - Addition of 06-ba-03/0xe0 microcode (in intel-ucode/06-ba-02) at revision\n    0x411c;\n  - Addition of 06-ba-02/0xe0 microcode (in intel-ucode/06-ba-03) at revision\n    0x411c;\n  - Addition of 06-ba-02/0xe0 microcode (in intel-ucode/06-ba-03) at revision\n    0x411c;\n  - Addition of 06-ba-03/0xe0 microcode at revision 0x411c;\n  - Addition of 06-be-00/0x11 microcode at revision 0x12;\n  - Removal of 06-ba-02/0xc0 microcode at revision 0x4112;\n  - Removal of 06-ba-02/0xc0 microcode at revision 0x4112;\n  - Removal of 06-ba-03/0xc0 microcode (in intel-ucode/06-ba-02) at revision\n    0x4112;\n  - Removal of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at revision\n    0x4112;\n  - Removal of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at revision\n    0x4112;\n  - Removal of 06-ba-03/0xc0 microcode at revision 0x4112;\n  - Removal of 06-be-00/0x01 microcode at revision 0x10;\n  - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000171 up to\n    0x1000181;\n  - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision\n    0x2006f05 up to 0x2007006;\n  - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003501 up to\n    0x4003604;\n  - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision\n    0x5003501 up to 0x5003604;\n  - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002601 up to\n    0x7002703;\n  - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000390 up to\n    0xd0003b9;\n  - Update of 06-6c-01/0x10 microcode from revision 0x1000230 up to 0x1000268;\n  - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xba up to\n    0xc2;\n  - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision 0xaa up to\n    0xb4;\n  - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x2a up to 0x34;\n  - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x44 up to 0x4e;\n  - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xf2 up to\n    0xf4;\n  - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xf2\n    up to 0xf4;\n  - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision\n    0xf2 up to 0xf4;\n  - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xf2 up to 0xf4;\n  - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode\n    from revision 0xf6 up to 0xf8;\n  - Update of 06-8f-04/0x10 microcode from revision 0x2c0001d1 up to\n    0x2c000290;\n  - Update of 06-8f-04/0x87 microcode from revision 0x2b000461 up to\n    0x2b0004d0;\n  - Update of 06-8f-05/0x10 microcode (in intel-ucode/06-8f-04) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 microcode (in intel-ucode/06-8f-04) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-06/0x87 microcode (in intel-ucode/06-8f-04) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode (in intel-ucode/06-8f-04) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-04) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-04) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-04) at revision\n    0x2c0001d1;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-04) at revision\n    0x2c0001d1;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-04) at revision\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-04) at revision\n    0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-04) at revision\n    0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-04) at revision\n    0x2b000461;\n  - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-04/0x87 microcode (in intel-ucode/06-8f-05) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 microcode from revision 0x2c0001d1 up to\n    0x2c000290;\n  - Update of 06-8f-05/0x87 microcode from revision 0x2b000461 up to\n    0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-06/0x87 microcode (in intel-ucode/06-8f-05) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode (in intel-ucode/06-8f-05) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-05) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-05) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-05) at revision\n    0x2c0001d1;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-05) at revision\n    0x2c0001d1;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-05) at revision\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-05) at revision\n    0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-05) at revision\n    0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-05) at revision\n    0x2b000461;\n  - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-04/0x87 microcode (in intel-ucode/06-8f-06) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 microcode (in intel-ucode/06-8f-06) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 microcode (in intel-ucode/06-8f-06) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode from revision 0x2c0001d1 up to\n    0x2c000290;\n  - Update of 06-8f-06/0x87 microcode from revision 0x2b000461 up to\n    0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode (in intel-ucode/06-8f-06) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-06) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-06) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-06) at revision\n    0x2c0001d1;\n  - Removal of 06-8f-08/0x10 microcode (in intel-ucode/06-8f-06) at revision\n    0x2c0001d1;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-06) at revision\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-06) at revision\n    0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-06) at revision\n    0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-06) at revision\n    0x2b000461;\n  - Update of 06-8f-04/0x87 microcode (in intel-ucode/06-8f-07) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x87 microcode (in intel-ucode/06-8f-07) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x87 microcode (in intel-ucode/06-8f-07) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode from revision 0x2b000461 up to\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-07) at revision\n    0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-07) at revision\n    0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-07) at revision\n    0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode (in intel-ucode/06-8f-07) at revision\n    0x2b000461;\n  - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-04/0x87 microcode (in intel-ucode/06-8f-08) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 microcode (in intel-ucode/06-8f-08) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 microcode (in intel-ucode/06-8f-08) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from revision\n    0x2c0001d1 up to 0x2c000290;\n  - Update of 06-8f-06/0x87 microcode (in intel-ucode/06-8f-08) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 microcode (in intel-ucode/06-8f-08) from revision\n    0x2b000461 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 microcode at revision 0x2c000290;\n  - Addition of 06-8f-08/0x10 microcode at revision 0x2c000290;\n  - Removal of 06-8f-08/0x10 microcode at revision 0x2c0001d1;\n  - Removal of 06-8f-08/0x10 microcode at revision 0x2c0001d1;\n  - Addition of 06-8f-08/0x87 microcode at revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 microcode at revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 microcode at revision 0x2b000461;\n  - Removal of 06-8f-08/0x87 microcode at revision 0x2b000461;\n  - Addition of 06-97-02/0x07 microcode at revision 0x32;\n  - Addition of 06-97-02/0x07 microcode at revision 0x32;\n  - Removal of 06-97-02/0x07 microcode at revision 0x2c;\n  - Removal of 06-97-02/0x07 microcode at revision 0x2c;\n  - Update of 06-97-05/0x07 microcode (in intel-ucode/06-97-02) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 microcode (in intel-ucode/06-97-02) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-05/0x07 microcode (in intel-ucode/06-97-02) from revision\n    0x2c up to 0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-97-05) at revision\n    0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-97-05) at revision\n    0x32;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-97-05) at revision\n    0x2c;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-97-05) at revision\n    0x2c;\n  - Update of 06-97-05/0x07 microcode from revision 0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 microcode (in intel-ucode/06-97-05) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-05/0x07 microcode (in intel-ucode/06-97-05) from revision\n    0x2c up to 0x32;\n  - Addition of 06-9a-03/0x80 microcode at revision 0x430;\n  - Addition of 06-9a-03/0x80 microcode at revision 0x430;\n  - Removal of 06-9a-03/0x80 microcode at revision 0x42a;\n  - Removal of 06-9a-03/0x80 microcode at revision 0x42a;\n  - Update of 06-9a-04/0x80 microcode (in intel-ucode/06-9a-03) from revision\n    0x42a up to 0x430;\n  - Addition of 06-9a-03/0x80 microcode (in intel-ucode/06-9a-04) at revision\n    0x430;\n  - Addition of 06-9a-03/0x80 microcode (in intel-ucode/06-9a-04) at revision\n    0x430;\n  - Removal of 06-9a-03/0x80 microcode (in intel-ucode/06-9a-04) at revision\n    0x42a;\n  - Removal of 06-9a-03/0x80 microcode (in intel-ucode/06-9a-04) at revision\n    0x42a;\n  - Update of 06-9a-04/0x40 microcode from revision 0x4 up to 0x5;\n  - Update of 06-9a-04/0x80 microcode from revision 0x42a up to 0x430;\n  - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision\n    0xf2 up to 0xf4;\n  - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xf2 up\n    to 0xf4;\n  - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xf2 up to\n    0xf4;\n  - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xf2 up\n    to 0xf4;\n  - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xf8 up\n    to 0xfa;\n  - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf6 up to 0xf8;\n  - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf6 up to\n    0xf8;\n  - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf6 up to\n    0xf8;\n  - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf6 up to\n    0xf8;\n  - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xf6 up\n    to 0xf8;\n  - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x58 up to 0x5d;\n  - Update of 06-b7-01/0x32 microcode from revision 0x113 up to 0x11d;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-bf-02) at revision\n    0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-bf-02) at revision\n    0x32;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-bf-02) at revision\n    0x2c;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-bf-02) at revision\n    0x2c;\n  - Update of 06-97-05/0x07 microcode (in intel-ucode/06-bf-02) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 microcode from revision 0x2c up to 0x32;\n  - Update of 06-bf-05/0x07 microcode (in intel-ucode/06-bf-02) from revision\n    0x2c up to 0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-bf-05) at revision\n    0x32;\n  - Addition of 06-97-02/0x07 microcode (in intel-ucode/06-bf-05) at revision\n    0x32;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-bf-05) at revision\n    0x2c;\n  - Removal of 06-97-02/0x07 microcode (in intel-ucode/06-bf-05) at revision\n    0x2c;\n  - Update of 06-97-05/0x07 microcode (in intel-ucode/06-bf-05) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-02/0x07 microcode (in intel-ucode/06-bf-05) from revision\n    0x2c up to 0x32;\n  - Update of 06-bf-05/0x07 microcode from revision 0x2c up to 0x32.","status":"published","published":"2023-12-12T22:40:20Z","modified":"2026-06-01T00:32:26.692580901Z","updated_at":"2026-11-02T15:43:40.88185Z"},{"id":"CLSA-2023-1702421029","title":"microcode_ctl: Fix of CVE-2023-23583","description":"- Update Intel CPU microcode to microcode-20231114 release, addresses\n  CVE-2023-23583 (INTEL-SA-00950):\n  - Update of 06-6a-06/0x87 (ICX-SP D0) microcode (in 06-6a-06) from revision\n    0xd0003a5 up to 0xd0003b9;\n  - Update of 06-6c-01/0x10 (ICL-D B0) microcode (in 06-6c-01) from revision\n    0x1000230 up to 0x1000268;\n  - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode (in 06-7e-05) from revision\n    0xbc up to 0xc2;\n  - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in 06-8c-01) from\n    revision 0xac up to 0xb4;\n  - Update of 06-8c-02/0xc2 (TGL-R C0) microcode (in 06-8c-02) from revision\n    0x2c up to 0x34;\n  - Update of 06-8d-01/0xc2 (TGL-H R0) microcode (in 06-8d-01) from revision\n    0x46 up to 0x4e;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-04) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-04) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-04) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-04) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-04) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-04) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-04) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-04) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-04) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-05) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-05) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-05) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-05) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-05) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-05) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-05) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-05) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-05) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-06) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-06) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-06) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-06) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-06) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-06) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-06) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-06) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-06) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-07) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-07) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-07) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-07) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-07) at revision\n    0x2b0004b1;\n  - Update of 06-8f-04/0x10 microcode (in 06-8f-08) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in 06-8f-08) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in 06-8f-08) from revision\n    0x2c000271 up to 0x2c000290;\n  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in 06-8f-08) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-06/0x10 microcode (in 06-8f-08) from revision 0x2c000271 up\n    to 0x2c000290;\n  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in 06-8f-08) from revision\n    0x2b0004b1 up to 0x2b0004d0;\n  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in 06-8f-08) from\n    revision 0x2b0004b1 up to 0x2b0004d0;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000290;\n  - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000290;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000271;\n  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in 06-8f-08) at revision\n    0x2c000271;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at\n    revision 0x2b0004d0;\n  - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at\n    revision 0x2b0004d0;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at revision\n    0x2b0004b1;\n  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in 06-8f-08) at revision\n    0x2b0004b1;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-02) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-97-02) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-97-02) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-97-02) from revision 0x2e\n    up to 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-97-05) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-97-05) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-97-05) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-97-05) from revision 0x2e\n    up to 0x32;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x430;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x42c;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-03) at\n    revision 0x42c;\n  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in 06-9a-03) from\n    revision 0x42c up to 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x430;\n  - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x430;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x42c;\n  - Removal of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in 06-9a-04) at\n    revision 0x42c;\n  - Update of 06-9a-04/0x40 (AZB A0) microcode (in 06-9a-04) from revision 0x4\n    up to 0x5;\n  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in 06-9a-04) from\n    revision 0x42c up to 0x430;\n  - Update of 06-a7-01/0x02 (RKL-S B0) microcode (in 06-a7-01) from revision\n    0x59 up to 0x5d;\n  - Update of 06-b7-01/0x32 (RPL-S B0) microcode (in 06-b7-01) from revision\n    0x119 up to 0x11d;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x411c;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x411c;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x4119;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-02) at\n    revision 0x4119;\n  - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in 06-ba-02) from\n    revision 0x4119 up to 0x411c;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x411c;\n  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x411c;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x4119;\n  - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in 06-ba-03) at\n    revision 0x4119;\n  - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in 06-ba-03) from\n    revision 0x4119 up to 0x411c;\n  - Update of 06-be-00/0x11 (ADL-N A0) microcode (in 06-be-00) from revision\n    0x11 up to 0x12;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-02) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-bf-02) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-bf-02) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-bf-02) from revision 0x2e\n    up to 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x32;\n  - Addition of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x32;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x2e;\n  - Removal of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in 06-bf-05) at\n    revision 0x2e;\n  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in 06-bf-05) from\n    revision 0x2e up to 0x32;\n  - Update of 06-bf-02/0x07 (ADL C0) microcode (in 06-bf-05) from revision 0x2e\n    up to 0x32;\n  - Update of 06-bf-05/0x07 (ADL C0) microcode (in 06-bf-05) from revision 0x2e\n    up to 0x32.","status":"published","published":"2023-12-12T22:43:53Z","modified":"2026-06-01T00:32:44.917809931Z","updated_at":"2026-11-02T15:43:40.88185Z"},{"id":"DLA-3690-1","title":"intel-microcode - security update","status":"published","published":"2023-12-16T00:00:00Z","modified":"2026-03-09T02:08:36.99789Z","updated_at":"2026-11-02T15:46:12.203458Z"},{"id":"DSA-5563-1","title":"intel-microcode - security update","status":"published","published":"2023-11-23T00:00:00Z","modified":"2026-03-09T02:11:31.277195Z","updated_at":"2026-11-02T15:46:17.892347Z"},{"id":"MGASA-2024-0028","title":"Updated microcode fixes bugs and a security vulnerability","description":"The updated package contains microcode updates for Intel and AMD CPUs,\nincluding a fix for a security vulnerability:\nSequence of processor instructions leads to unexpected behavior for some\nIntel(R) Processors may allow an authenticated user to potentially\nenable escalation of privilege and/or information disclosure and/or\ndenial of service via local access. (CVE-2023-23583)\n","status":"published","published":"2024-02-09T01:34:03Z","modified":"2026-04-16T04:43:46.845756447Z","updated_at":"2026-11-02T15:49:42.684501Z"},{"id":"openSUSE-SU-2024:13434-1","title":"ucode-intel-20231114-1.1 on GA media","description":"These are all security issues fixed in the ucode-intel-20231114-1.1 package on the GA media of openSUSE Tumbleweed.","status":"published","published":"2024-06-15T00:00:00Z","modified":"2026-02-04T03:44:18.353343Z","updated_at":"2026-11-02T16:58:36.327643Z"},{"id":"openSUSE-SU-2026:11242-1","title":"spectre-meltdown-checker-26.36.0602723-1.1 on GA media","description":"These are all security issues fixed in the spectre-meltdown-checker-26.36.0602723-1.1 package on the GA media of openSUSE Tumbleweed.","status":"published","published":"2026-07-09T00:00:00Z","modified":"2026-07-10T10:00:10.593286162Z","updated_at":"2026-11-02T16:58:38.95195Z"},{"id":"SUSE-SU-2023:4440-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Updated to Intel CPU Microcode 20231114 pre-release (labeled 20231113). (bsc#1215278)\n- CVE-2023-23583: Fixed potential CPU deadlocks or privilege escalation. (bsc#1215278)\n","status":"published","published":"2023-11-14T19:13:05Z","modified":"2026-02-04T03:26:27.870829Z","updated_at":"2026-11-02T15:53:53.865042Z"},{"id":"SUSE-SU-2023:4441-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Updated to Intel CPU Microcode 20231114 pre-release (labeled 20231113). (bsc#1215278)\n- CVE-2023-23583: Fixed potential CPU deadlocks or privilege escalation. (bsc#1215278)\n","status":"published","published":"2023-11-14T19:13:31Z","modified":"2026-02-04T04:23:09.600712Z","updated_at":"2026-11-02T15:53:53.865042Z"},{"id":"SUSE-SU-2023:4442-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Updated to Intel CPU Microcode 20231114 pre-release (labeled 20231113). (bsc#1215278)\n- CVE-2023-23583: Fixed potential CPU deadlocks or privilege escalation. (bsc#1215278)\n","status":"published","published":"2023-11-14T19:13:38Z","modified":"2026-02-04T03:16:18.307672Z","updated_at":"2026-11-02T15:53:53.865042Z"},{"id":"SUSE-SU-2023:4493-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Updated to Intel CPU Microcode 20231114 release. (bsc#1215278)\n- CVE-2023-23583: Fixed potential CPU deadlocks or privilege escalation. (bsc#1215278)\n","status":"published","published":"2023-11-20T20:03:55Z","modified":"2026-02-04T02:28:26.666152Z","updated_at":"2026-11-02T15:53:53.865042Z"},{"id":"SUSE-SU-2023:4500-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Updated to Intel CPU Microcode 20231114 release. (bsc#1215278)\n- CVE-2023-23583: Fixed potential CPU deadlocks or privilege escalation. (bsc#1215278)\n","status":"published","published":"2023-11-21T11:04:21Z","modified":"2026-02-04T04:23:52.949141Z","updated_at":"2026-11-02T15:53:53.865042Z"},{"id":"SUSE-SU-2023:4510-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Updated to Intel CPU Microcode 20231114 release. (bsc#1215278)\n- CVE-2023-23583: Fixed potential CPU deadlocks or privilege escalation. (bsc#1215278)\n","status":"published","published":"2023-11-21T15:37:58Z","modified":"2026-02-04T02:23:26.912608Z","updated_at":"2026-11-02T15:53:53.865042Z"},{"id":"SUSE-SU-2025:1032-1","title":"Security update for microcode_ctl","description":"This update for microcode_ctl fixes the following issues:\n\n - CVE-2024-31068: Improper Finite State Machines (FSMs) in Hardware\n     Logic for some Intel Processors may allow privileged user to\n     potentially enable denial of service via local access. (bsc#1237096)\n - CVE-2024-36293: A potential security vulnerability in some Intel\n     Software Guard Extensions (Intel SGX) Platforms may allow denial\n     of service. Intel is releasing microcode updates to mitigate this\n     potential vulnerability. (bsc#1237096)\n - CVE-2024-39355: A potential security vulnerability in some\n     13th and 14th Generation Intel Core Processors may allow denial\n     of service. Intel is releasing microcode and UEFI reference code\n     updates to mitigate this potential vulnerability. (bsc#1237096)\n - CVE-2024-37020: A potential security vulnerability in the Intel\n     Data Streaming Accelerator (Intel DSA) for some Intel Xeon Processors\n     may allow denial of service. Intel is releasing software updates to\n     mitigate this potential vulnerability. (bsc#1237096)\n - CVE-2024-21853: Faulty finite state machines (FSMs) in the hardware logic\n     in some 4th and 5th Generation Intel Xeon Processors may allow an\n     authorized user to potentially enable denial of service via local access. (bsc#1233313) \n - CVE-2024-23918: Improper conditions check in some Intel Xeon processor\n     memory controller configurations when using Intel SGX may allow a\n     privileged user to potentially enable escalation of privilege via\n     local access. (bsc#1233313)\n - CVE-2024-21820: Incorrect default permissions in some Intel Xeon processor\n     memory controller configurations when using Intel SGX may allow a privileged\n     user to potentially enable escalation of privilege via local access. (bsc#1233313)\n - CVE-2024-24968: Improper finite state machines (FSMs) in hardware logic in\n     some Intel Processors may allow an privileged user to potentially enable a\n     denial of service via local access. (bsc#1230400)\n - CVE-2024-23984: Observable discrepancy in RAPL interface for some Intel\n     Processors may allow a privileged user to potentially enable information\n     disclosure via local access. (bsc#1230400)\n - CVE-2024-24853: Incorrect behavior order in transition between executive\n     monitor and SMI transfer monitor (STM) in some Intel(R) Processor may\n     allow a privileged user to potentially enable escalation of privilege\n     via local access. (bsc#1229129)\n - CVE-2024-25939: Mirrored regions with different values in 3rd Generation Intel(R)\n     Xeon(R) Scalable Processors may allow a privileged user to potentially enable\n     denial of service via local access. (bsc#1229129)\n - CVE-2024-24980: Protection mechanism failure in some 3rd, 4th, and 5th Generation\n     Intel(R) Xeon(R) Processors may allow a privileged user to potentially enable\n     escalation of privilege via local access. (bsc#1229129)\n - CVE-2023-42667: Improper isolation in the Intel(R) Core(TM) Ultra Processor stream\n     cache mechanism may allow an authenticated user to potentially enable escalation\n     of privilege via local access. (bsc#1229129)\n - CVE-2023-49141: Improper isolation in some Intel(R) Processors stream cache mechanism\n     may allow an authenticated user to potentially enable escalation of privilege via\n     local access. (bsc#1229129)\n - CVE-2023-45733: Hardware logic contains race conditions in some Intel(R) Processors\n     may allow an authenticated user to potentially enable partial information disclosure\n     via local access. (bsc#1224277)\n - CVE-2023-46103: Sequence of processor instructions leads to unexpected behavior in\n     Intel(R) Core(TM) Ultra Processors may allow an authenticated user to potentially\n     enable denial of service via local access. (bsc#1224277)\n - CVE-2023-45745: Improper input validation in some Intel(R) TDX module software before\n     version 1.5.05.46.698 may allow a privileged user to potentially enable escalation\n     of privilege via local access. (bsc#1224277)\n - CVE-2023-47855: Improper input validation in some Intel(R) TDX module software before\n     version 1.5.05.46.698 may allow a privileged user to potentially enable escalation\n     of privilege via local access. (bsc#1224277)\n - CVE-2023-39368: Protection mechanism failure of bus lock regulator\n     for some Intel Processors may allow an unauthenticated user to\n     potentially enable denial of service via network access. (bsc#1221323)\n - CVE-2023-38575: Non-transparent sharing of return predictor targets\n     between contexts in some Intel Processors may allow an authorized\n     user to potentially enable information disclosure via local access. (bsc#1221323)   \n - CVE-2023-28746: Information exposure through microarchitectural\n     state after transient execution from some register files for some\n     Intel Atom Processors may allow an authenticated user to potentially\n     enable information disclosure via local access. (bsc#1221323)\n - CVE-2023-22655: Protection mechanism failure in some 3rd and 4th\n     Generation Intel Xeon Processors when using Intel SGX or Intel TDX\n     may allow a privileged user to potentially enable escalation of\n     privilege via local access. (bsc#1221323)\n - CVE-2023-43490: Incorrect calculation in microcode keying mechanism\n     for some Intel Xeon D Processors with Intel SGX may allow a\n     privileged user to potentially enable information disclosure via\n     local access.  (bsc#1221323)\n - CVE-2023-23583: Fixed potential CPU deadlocks or privilege escalation (bsc#1215278)\n - CVE-2022-40982: Information exposure through microarchitectural state after transient\n     execution in certain vector execution units for some Intel(R) Processors may allow\n     an authenticated user to potentially enable information disclosure via local access. (bsc#1206418) \n - CVE-2023-23908: Improper access control in some 3rd Generation Intel(R) Xeon(R) Scalable\n     processors may allow a privileged user to potentially enable information disclosure\n     via local access.\n - CVE-2022-41804: Unauthorized error injection in Intel(R) SGX or Intel(R) TDX for some\n     Intel(R) Xeon(R) Processors may allow a privileged user to potentially enable escalation\n     of privilege via local access.\n\nOther fixes:\n    \n- Intel CPU Microcode was updated to the 20250211 release (bsc#1237096)\n  - Security updates for INTEL-SA-01166 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01166.html\n  - Security updates for INTEL-SA-01213 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01213.html\n  - Security updates for INTEL-SA-01139 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01139.html\n  - Security updates for INTEL-SA-01228 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01228.html\n  - Security updates for INTEL-SA-01194 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01194.html\n  - Update for functional issues. Refer to Intel Core Ultra Processor https://cdrdv2.intel.com/v1/dl/getContent/792254 for details.\n  - Update for functional issues. Refer to 13th/14th Generation Intel Core Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/740518 for details.\n  - Update for functional issues. Refer to 12th Generation Intel Core Processor Family https://cdrdv2.intel.com/v1/dl/getContent/682436 for details.\n  - Update for functional issues. Refer to 11th Gen Intel Core Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/631123 for details.\n  - Update for functional issues. Refer to 8th and 9th Generation Intel Core Processor Family Spec Update https://cdrdv2.intel.com/v1/dl/getContent/337346 for details.\n  - Update for functional issues. Refer to 5th Gen Intel Xeon Scalable Processors Specification Update https://cdrdv2.intel.com/v1/dl/getContent/793902 for details.\n  - Update for functional issues. Refer to 4th Gen Intel Xeon Scalable Processors Specification Update https://cdrdv2.intel.com/v1/dl/getContent/772415 for details.\n  - Update for functional issues. Refer to 3rd Generation Intel Xeon Processor Scalable Family Specification Update https://cdrdv2.intel.com/v1/dl/getContent/637780 for details.\n  - Update for functional issues. Refer to Intel Xeon D-2700 Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/714071 for details.\n  - Update for functional issues. Refer to Intel Xeon E-2300 Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/709192 for details.\n  - Update for functional issues. Refer to Intel Xeon 6700-Series Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/820922 for details.\n  - Update for functional issues. Refer to Intel Processors and Intel Core i3 N-Series https://cdrdv2.intel.com/v1/dl/getContent/764616 for details\n\n- Intel CPU Microcode was updated to the 20241112 release (bsc#1233313)\n  - Security updates for [INTEL-SA-01101](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01101.html).\n  - Security updates for [INTEL-SA-01079](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01079.html).\n  - Security updates for [INTEL-SA-01079](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01079.html).\n  - Updated security updates for [INTEL-SA-01097](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01097.html).\n  - Updated security updates for [INTEL-SA-01103](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01103.html).\n  - Update for functional issues. Refer to [Intel Core Ultra Processor](https://cdrdv2.intel.com/v1/dl/getContent/792254) for details.\n  - Update for functional issues. Refer to [14th/13th Generation Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.\n  - Update for functional issues. Refer to [12th Generation Intel Core Processor Family](https://cdrdv2.intel.com/v1/dl/getContent/682436) for details.\n  - Update for functional issues. Refer to [5th Gen Intel Xeon Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/793902) for details.\n  - Update for functional issues. Refer to [4th Gen Intel Xeon Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/772415) for details.\n  - Update for functional issues. Refer to [3rd Generation Intel Xeon Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/637780) for details.\n  - Update for functional issues. Refer to [Intel Xeon D-2700 Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/714071) for details.\n  - Update for functional issues. Refer to [Intel Xeon D-1700 and D-1800 Processor Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/714069) for details\n\n- Intel CPU Microcode was updated to the 20241029 release (bsc#1230400)\n  - Update for functional issues. Refer to [14th/13th Generation Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.\n\n- Intel CPU Microcode was updated to the 20240910 release (bsc#1230400)\n  - Security updates for [INTEL-SA-01103](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01103.html)\n  - Security updates for [INTEL-SA-01097](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01097.html)\n  - Update for functional issues. Refer to [Intel Core Ultra Processor](https://cdrdv2.intel.com/v1/dl/getContent/792254) for details.\n  - Update for functional issues. Refer to [13th Generation Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.\n  - Update for functional issues. Refer to [12th Generation Intel Core Processor Family](https://cdrdv2.intel.com/v1/dl/getContent/682436) for details.\n  - Update for functional issues. Refer to [Intel Processors and Intel Core i3 N-Series](https://cdrdv2.intel.com/v1/dl/getContent/764616) for details.\n\n- Intel CPU Microcode was updated to the 20240813 release (bsc#1229129)\n  - Security updates for [INTEL-SA-01083](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01083.html)\n  - Security updates for [INTEL-SA-01118](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01118.html)\n  - Security updates for [INTEL-SA-01100](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01100.html)\n  - Security updates for [INTEL-SA-01038](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01038.html)\n  - Security updates for [INTEL-SA-01046](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01046.html)\n  - Update for functional issues. Refer to [Intel Core Ultra Processor](https://cdrdv2.intel.com/v1/dl/getContent/792254) for details.\n  - Update for functional issues. Refer to [3rd Generation Intel Xeon Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/637780) for details.\n  - Update for functional issues. Refer to [3rd Generation Intel Xeon Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/634897) for details.\n  - Update for functional issues. Refer to [2nd Generation Intel Xeon Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338848) for details\n  - Update for functional issues. Refer to [Intel Xeon D-2700 Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/714071) for details.\n  - Update for functional issues. Refer to [Intel Xeon E-2300 Processor Specification Update ](https://cdrdv2.intel.com/v1/dl/getContent/709192) for details.\n  - Update for functional issues. Refer to [13th Generation Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.\n  - Update for functional issues. Refer to [12th Generation Intel Core Processor Family](https://cdrdv2.intel.com/v1/dl/getContent/682436) for details.\n  - Update for functional issues. Refer to [11th Gen Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/631123) for details.\n  - Update for functional issues. Refer to [10th Gen Intel Core Processor Families Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/341079) for details.\n  - Update for functional issues. Refer to [10th Generation Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/615213) for details.\n  - Update for functional issues. Refer to [8th and 9th Generation Intel Core Processor Family Spec Update](https://cdrdv2.intel.com/v1/dl/getContent/337346) for details.\n  - Update for functional issues. Refer to [8th Generation Intel Core Processor Families Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338025) for details.\n  - Update for functional issues. Refer to [7th and 8th Generation Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/334663) for details.\n  - Update for functional issues. Refer to [Intel Processors and Intel Core i3 N-Series](https://cdrdv2.intel.com/v1/dl/getContent/764616) for details.\n  - Update for functional issues. Refer to [Intel Atom x6000E Series, and Intel Pentium and Celeron N and J Series Processors for Internet of Things (IoT) Applications](https://cdrdv2.intel.com/v1/dl/getContent/636674) for details.\n\n- Intel CPU Microcode was updated to 20240531 release:\n  - Update for functional issues. Refer to Intel Pentium Silver\n    and Intel Celeron Processor Specification Update\n  \n- Intel CPU Microcode was updated to the 20240514 release (bsc#1224277)\n  - Security updates for INTEL-SA-01051 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01051.html\n  - Security updates for INTEL-SA-01052 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01052.html\n  - Security updates for INTEL-SA-01036 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01036.html\n  - Update for functional issues. Refer to 5th Gen Intel Xeon Processor Scalable Family https://cdrdv2.intel.com/v1/dl/getContent/793902 for details.\n  - Update for functional issues. Refer to 4th Gen Intel Xeon Scalable Processors Specification Update https://cdrdv2.intel.com/v1/dl/getContent/772415 for details.\n  - Update for functional issues. Refer to 14th 13th Generation Intel Core Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/740518 for details.\n  - Update for functional issues. Refer to 12th Generation Intel Core Processor Family https://cdrdv2.intel.com/v1/dl/getContent/682436 for details.\n  - Update for functional issues. Refer to Intel Processors and Intel Core i3 N-Series https://cdrdv2.intel.com/v1/dl/getContent/764616 for details.\n\n- - Intel CPU Microcode was updated to 20240312 release. (bsc#1221323)\n  - Security updates for INTEL-SA-INTEL-SA-00972 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00972.html\n  - Security updates for INTEL-SA-INTEL-SA-00982 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00982.html\n  - Security updates for INTEL-SA-INTEL-SA-00898 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00898.html\n  - Security updates for INTEL-SA-INTEL-SA-00960 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00960.html\n  - Security updates for INTEL-SA-INTEL-SA-01045 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01045.html\n  - Update for functional issues. Refer to Intel Core Ultra Processor https://cdrdv2.intel.com/v1/dl/getContent/792254 for details.\n  - Update for functional issues. Refer to 13th Generation Intel Core Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/740518 for details.\n  - Update for functional issues. Refer to 12th Generation Intel Core Processor Family https://cdrdv2.intel.com/v1/dl/getContent/682436 for details.\n  - Update for functional issues. Refer to 11th Gen Intel Core Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/631123 for details.\n  - Update for functional issues. Refer to 10th Gen Intel Core Processor Families Specification Update https://cdrdv2.intel.com/v1/dl/getContent/341079 for details.\n  - Update for functional issues. Refer to 10th Generation Intel Core Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/615213 for details.\n  - Update for functional issues. Refer to 8th and 9th Generation Intel Core Processor Family Spec Update https://cdrdv2.intel.com/v1/dl/getContent/337346 for details.\n  - Update for functional issues. Refer to 8th Generation Intel Core Processor Families Specification Update https://cdrdv2.intel.com/v1/dl/getContent/338025 for details.\n  - Update for functional issues. Refer to 7th and 8th Generation Intel Core Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/334663 for details.\n  - Update for functional issues. Refer to 5th Gen Intel Xeon Scalable Processors Specification Update https://cdrdv2.intel.com/v1/dl/getContent/793902 for details.\n  - Update for functional issues. Refer to 4th Gen Intel Xeon Scalable Processors Specification Update https://cdrdv2.intel.com/v1/dl/getContent/772415 for details.\n  - Update for functional issues. Refer to 3rd Generation Intel Xeon Scalable Processors Specification Update https://cdrdv2.intel.com/v1/dl/getContent/634897 for details.\n  - Update for functional issues. Refer to 3rd Generation Intel Xeon Processor Scalable Family Specification Update https://cdrdv2.intel.com/v1/dl/getContent/637780 for details.\n  - Update for functional issues. Refer to 2nd Generation Intel Xeon Processor Scalable Family Specification Update https://cdrdv2.intel.com/v1/dl/getContent/338848 for details.\n  - Update for functional issues. Refer to Intel Processors and Intel Core i3 N-Series https://cdrdv2.intel.com/v1/dl/getContent/764616 for details.\n  - Update for functional issues. Refer to Intel Xeon D-2700 Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/714071 for details.\n  - Update for functional issues. Refer to Intel Xeon E-2300 Processor Specification Update  https://cdrdv2.intel.com/v1/dl/getContent/709192 for details.\n  - Update for functional issues. Refer to Intel Xeon Processor Scalable Family Specification Update https://cdrdv2.intel.com/v1/dl/getContent/613537 for details.\n  - Update for functional issues. Refer to Intel Atom C3000 Processor Product Family Specification Update https://cdrdv2.intel.com/v1/dl/getContent/336345 for details.\n  - Update for functional issues. Refer to Intel Atom x6000E Series, and Intel Pentium and Celeron N and J Series Processors for Internet of Things (IoT) Applications https://cdrdv2.intel.com/v1/dl/getContent/636674 for details.\n  - Update for functional issues. Refer to Intel Pentium Silver and Intel Celeron Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/336562 for details.\n  - Update for functional issues. Refer to Intel Pentium Silver and Intel Celeron Processor Specification Update https://cdrdv2.intel.com/v1/dl/getContent/634542 for details.\n  \n- Intel CPU Microcode was updated to 20231114 release. (bsc#1215278)\n  - Security updates for [INTEL-SA-00950](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00950.html)\n  - Update for functional issues. Refer to [13th Generation Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.\n  - Update for functional issues. Refer to [12th Generation Intel Core Processor Family](https://cdrdv2.intel.com/v1/dl/getContent/682436) for details.\n  - Update for functional issues. Refer to [11th Gen Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/631123) for details.\n  - Update for functional issues. Refer to [10th Gen Intel Core Processor Families Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/341079) for details.\n  - Update for functional issues. Refer to [4th Gen Intel Xeon Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/772415) for details.\n  - Update for functional issues. Refer to [3rd Generation Intel Xeon Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/634897) for details.\n  - Update for functional issues. Refer to [Intel Processors and Intel Core i3 N-Series](https://cdrdv2.intel.com/v1/dl/getContent/764616) for details.\n  - Update for functional issues. Refer to [Intel Xeon D-2700 Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/714071) for details.\n  - Update for functional issues. Refer to [Intel Xeon E-2300 Processor Specification Update ](https://cdrdv2.intel.com/v1/dl/getContent/709192) for details.\n \n- Intel CPU Microcode was updated to 20231114 pre-release (labeled 20231113). (bsc#1215278)\n\n- Intel CPU Microcode was updated to 20230808 release. (bsc#1214099)\n  - Security updates for [INTEL-SA-00828](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00828.html) (bsc#1206418)\n  - Security updates for [INTEL-SA-00836](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00836.html)\n  - Security updates for [INTEL-SA-00837](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00837.html)\n  - Update for functional issues. Refer to [13th Generation Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.\n  - Update for functional issues. Refer to [12th Generation Intel Core Processor Family](https://cdrdv2.intel.com/v1/dl/getContent/682436) for details.\n  - Update for functional issues. Refer to [11th Gen Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/631123) for details.\n  - Update for functional issues. Refer to [10th Gen Intel Core Processor Families Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/341079) for details.\n  - Update for functional issues. Refer to [8th and 9th Generation Intel Core Processor Family Spec Update](https://cdrdv2.intel.com/v1/dl/getContent/337346) for details.\n  - Update for functional issues. Refer to [8th Generation Intel Core Processor Families Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338025) for details.\n  - Update for functional issues. Refer to [7th and 8th Generation Intel Core Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/334663) for details.\n  - Update for functional issues. Refer to [Intel Processors and Intel Core i3 N-Series](https://cdrdv2.intel.com/v1/dl/getContent/764616) for details.\n  - Update for functional issues. Refer to [4th Gen Intel Xeon Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/772415) for details.\n  - Update for functional issues. Refer to [3rd Generation Intel Xeon Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/634897) for details.\n  - Update for functional issues. Refer to [2nd Generation Intel Xeon Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338848) for details.\n  - Update for functional issues. Refer to [Intel Xeon Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/613537) for details.\n  - Update for functional issues. Refer to [3rd Generation Intel Xeon Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/637780) for details.\n  - Update for functional issues. Refer to [Intel Xeon E-2300 Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/709192) for details.\n  - Update for functional issues. Refer to [Intel Xeon D-2700 Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/714071) for details.\n  - Update for functional issues. Refer to [Intel Xeon D-2100 Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338854) for details.\n  \n- Intel CPU Microcode was updated to 20230613 release.\n  \n- Intel CPU Microcode was updated to 20230512 release.\n    \n- Intel CPU Microcode was updated to 20230512 release. (bsc#1211382)\n","status":"published","published":"2025-03-26T14:22:25Z","modified":"2026-02-04T02:25:38.270247Z","updated_at":"2026-11-02T15:53:59.381172Z"},{"id":"USN-6485-1","title":"intel-microcode vulnerability","description":"Benoit Morgan, Paul Grosen, Thais Moreira Hamasaki, Ke Sun, Alyssa Milburn,\nHisham Shafi, Nir Shlomovich, Tavis Ormandy, Daniel Moghimi, Josh Eads, Salman\nQazi, Alexandra Sandulescu, Andy Nguyen, Eduardo Vela, Doug Kwan, and Kostik\nShtoyk discovered that some Intel(R) Processors did not properly handle certain\nsequences of processor instructions. A local attacker could possibly use this to\ncause a core hang (resulting in a denial of service), gain access to sensitive\ninformation or possibly escalate their privileges.\n","status":"published","published":"2023-11-17T00:12:04Z","modified":"2026-06-25T13:31:34.887523911Z","updated_at":"2026-11-02T16:58:17.305935Z"}]}}