{"id":"CVE-2025-20103","aliases":["ALPINE-CVE-2025-20103","BELL-CVE-2025-20103","CLSA-2025-1754381424","CLSA-2025-1754381695","CLSA-2025-1754381806","CLSA-2025-1754381826","DEBIAN-CVE-2025-20103","DLA-4170-1","DSA-5924-1","EUVD-2025-14566","GHSA-5qwv-r493-496q","MGASA-2025-0160","OESA-2025-1528","SUSE-SU-2025:01650-1","SUSE-SU-2025:01651-1","SUSE-SU-2025:01651-2","SUSE-SU-2025:1567-1","SUSE-SU-2025:20410-1","SUSE-SU-2025:20424-1","UBUNTU-CVE-2025-20103","USN-7535-1","openSUSE-SU-2025:15093-1"],"status":"published","title":"Insufficient resource pool in the core management mechanism for some Intel(R) Processors may...","description":"Insufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial of service via local access.","severity":{"version":"4.0","score":5.7,"vector":"CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:N/VC:N/VI:N/VA:H/SC:N/SI:N/SA:N","level":"medium","assessor":"cna","from":"cve"},"epss":{"day":"2026-11-09","score":0.00177,"percentile":0.07283,"model":"v2026.06.15"},"facts":{"in_kev":false,"known_exploited":false,"public_exploit":false,"fix_available":true},"cwes":["CWE-410"],"published":"2025-05-13T21:02:15Z","modified":"2026-11-03T14:31:05Z","fixes":[{"ecosystem":"Alpine:v3.18","package":"intel-ucode","fixed_in":["20250512-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.19","package":"intel-ucode","fixed_in":["20250512-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.20","package":"intel-ucode","fixed_in":["20250512-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.21","package":"intel-ucode","fixed_in":["20250512-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.22","package":"intel-ucode","fixed_in":["20250512-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.23","package":"intel-ucode","fixed_in":["20250512-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.24","package":"intel-ucode","fixed_in":["20250512-r0"],"sources":["osv"]},{"ecosystem":"Alpaquita:23","package":"intel-ucode","fixed_in":["20250512-r0"],"sources":["osv"]},{"ecosystem":"Alpaquita:stream","package":"intel-ucode","fixed_in":["20250512-r0"],"sources":["osv"]},{"ecosystem":"Debian:12","package":"intel-microcode","fixed_in":["3.20250512.1~deb12u1"],"sources":["osv"]},{"ecosystem":"Debian:13","package":"intel-microcode","fixed_in":["3.20250512.1"],"sources":["osv"]},{"ecosystem":"Debian:14","package":"intel-microcode","fixed_in":["3.20250512.1"],"sources":["osv"]},{"ecosystem":"Ubuntu:Pro:16.04:LTS","package":"intel-microcode","fixed_in":["3.20250512.0ubuntu0.16.04.1+esm1"],"sources":["osv"]},{"ecosystem":"Ubuntu:Pro:18.04:LTS","package":"intel-microcode","fixed_in":["3.20250512.0ubuntu0.18.04.1+esm1"],"sources":["osv"]},{"ecosystem":"Ubuntu:20.04:LTS","package":"intel-microcode","fixed_in":["3.20250512.0ubuntu0.20.04.1"],"sources":["osv"]},{"ecosystem":"Ubuntu:22.04:LTS","package":"intel-microcode","fixed_in":["3.20250512.0ubuntu0.22.04.1"],"sources":["osv"]},{"ecosystem":"Ubuntu:24.04:LTS","package":"intel-microcode","fixed_in":["3.20250512.0ubuntu0.24.04.1"],"sources":["osv"]}],"affected":[{"source":"osv","ecosystem":"Alpine:v3.18","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250512-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.19","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250512-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.20","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250512-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.21","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250512-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.22","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250512-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.23","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250512-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.24","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250512-r0"}]}]},{"source":"osv","ecosystem":"Alpaquita:23","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"20230516a-r0"},{"fixed":"20250512-r0"}]}]},{"source":"osv","ecosystem":"Alpaquita:stream","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"20230214-r0"},{"fixed":"20250512-r0"}]}]},{"source":"osv","ecosystem":"TuxCare:CentOS:8.4","package":"microcode_ctl","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4:20210216-1.20250512.1.el8_4.tuxcare.els1"}]}],"bundled":8},{"source":"osv","ecosystem":"TuxCare:Ubuntu:16.04","package":"intel-microcode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"3.20250512.0ubuntu0.16.04.1+tuxcare.els1"}]}],"bundled":8},{"source":"osv","ecosystem":"TuxCare:Ubuntu:18.04","package":"intel-microcode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"3.20250512.0ubuntu0.18.04.1+tuxcare.els1"}]}],"bundled":8},{"source":"osv","ecosystem":"TuxCare:CentOS:8.5","package":"microcode_ctl","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"4:20250512-1.el8.tuxcare.els1"}]}],"bundled":8},{"source":"osv","ecosystem":"Debian:12","package":"intel-microcode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"3.20250512.1~deb12u1"}]}],"versions":["0.20080131-1","0.20080220-1","0.20080401-1","0.20080910-1","0.20080910-2","0.20090330-1","0.20090927-1","0.20100826-1","0.20100914-1","0.20101123-1","0.20110428-1","0.20110915-1","0.20111110-1","0.20120606-1","1.20120606.1","1.20120606.2","1.20120606.3","1.20120606.4","1.20120606.5","1.20120606.6","1.20120606.6~bpo60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access.","status":"published","published":"2025-05-13T21:16:07.213Z","modified":"2026-08-27T22:18:02.783089755Z","cvss":[{"version":"4.0","score":5.7,"vector":"CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:N/VC:N/VI:N/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X","level":"medium"}],"updated_at":"2026-11-02T15:27:49.709457Z"},{"id":"BELL-CVE-2025-20103","status":"published","published":"2025-05-15T05:59:14.869Z","modified":"2026-01-26T09:38:41.64215Z","cvss":[{"version":"3.1","score":6.5,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:N/I:N/A:H","level":"medium"}],"updated_at":"2026-11-02T15:28:21.227396Z"},{"id":"DEBIAN-CVE-2025-20103","description":"Insufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial of service via local access.","status":"published","published":"2025-05-13T21:16:07.213Z","modified":"2026-09-01T20:05:41.761722702Z","cvss":[{"version":"4.0","score":5.7,"vector":"CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:N/VC:N/VI:N/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X","level":"medium"}],"updated_at":"2026-11-02T15:45:45.102284Z"},{"id":"OESA-2025-1528","title":"microcode_ctl security update","description":"This is a tool to transform and deploy microcode update for x86 CPUs.\r\n\r\nSecurity Fix(es):\n\nExposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.(CVE-2024-28956)\n\nExposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Atom(R) processors may allow an authenticated user to potentially enable information disclosure via local access.(CVE-2024-43420)\n\nExposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.(CVE-2024-45332)\n\nIncorrect behavior order for some Intel(R) Core™ Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via physical access.(CVE-2025-20012)\n\nUncaught exception in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial of service via local access.(CVE-2025-20054)\n\nInsufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial of service via local access.(CVE-2025-20103)\n\nExposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel(R) Core™ processors (10th Generation) may allow an authenticated user to potentially enable information disclosure via local access.(CVE-2025-20623)\n\nIncorrect initialization of resource in the branch prediction unit for some Intel(R) Core™ Ultra Processors may allow an authenticated user to potentially enable information disclosure via local access.(CVE-2025-24495)","status":"published","published":"2025-05-16T11:08:37Z","modified":"2026-08-18T01:17:57.978659124Z","cvss":[{"version":"3.1","score":6.5,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:N/I:N/A:H","level":"medium"}],"updated_at":"2026-11-02T15:52:42.714349Z"},{"id":"UBUNTU-CVE-2025-20103","description":"Insufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial of service via local access.","status":"published","published":"2025-05-13T21:16:00Z","modified":"2026-02-04T03:11:53.603986Z","cvss":[{"version":"3.1","score":6.5,"vector":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:N/I:N/A:H","level":"medium"},{"version":"4.0","score":5.7,"vector":"CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:N/VC:N/VI:N/VA:H/SC:N/SI:N/SA:N","level":"medium"}],"updated_at":"2026-11-02T16:55:20.144818Z"},{"id":"CLSA-2025-1754381424","title":"microcode_ctl: Fix of 8 CVEs","description":"- Update Intel CPU microcode to 20250512 release, addresses\n  CVE-2025-20012, CVE-2025-24495, CVE-2024-43420, CVE-2025-20623, CVE-2024-45332,\n  CVE-2024-28956, CVE-2025-20103, CVE-2025-20054:\n  - Addition of cpuid:806F8/0x10 (SPR-HBM B3) microcode (in microcode.dat) at\n    revision 0x2c0003f7;\n  - Addition of cpuid:806F8/0x87 (SPR-SP E5/S3) microcode (in microcode.dat) at\n    revision 0x2b000639;\n  - Addition of cpuid:90672/0x07 (ADL-HX/S 8+8 C0) microcode (in microcode.dat)\n    at revision 0x3a;\n  - Addition of cpuid:906A3/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in\n    microcode.dat) at revision 0x437;\n  - Addition of cpuid:A06D1/0x20 (GNR-AP/SP H0) microcode (in microcode.dat) at\n    revision 0xa0000d1;\n  - Addition of cpuid:A06D1/0x95 (GNR-AP/SP B0) microcode (in microcode.dat) at\n    revision 0x10003a2;\n  - Addition of cpuid:B0650/0x80 (ARL-U A1) microcode (in microcode.dat) at\n    revision 0xa;\n  - Addition of cpuid:B0671/0x32 (RPL-S B0) microcode (in microcode.dat) at\n    revision 0x12f;\n  - Addition of cpuid:B06A2/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in\n    microcode.dat) at revision 0x4128;\n  - Addition of cpuid:B06D1/0x80 (LNL B0) microcode (in microcode.dat) at\n    revision 0x11f;\n  - Addition of cpuid:C0652/0x82 (ARL-H A1) microcode (in microcode.dat) at\n    revision 0x118;\n  - Addition of cpuid:C0662/0x82 (ARL-HX 8P/S B0) microcode (in microcode.dat)\n    at revision 0x118;\n  - Addition of cpuid:C0664/0x82 microcode (in microcode.dat) at revision\n    0x118;\n  - Addition of cpuid:C06A2/0x82 microcode (in microcode.dat) at revision\n    0x118;\n  - Addition of cpuid:C06F2/0x87 (EMR-SP A1) microcode (in microcode.dat) at\n    revision 0x210002a9;\n  - Removal of cpuid:50656/0xbf (CLX-SP B0) microcode (in microcode.dat) at\n    revision 0x4003605;\n  - Removal of cpuid:806F8/0x10 (SPR-HBM B3) microcode (in microcode.dat) at\n    revision 0x2c0003e0;\n  - Removal of cpuid:806F8/0x87 (SPR-SP E5/S3) microcode (in microcode.dat) at\n    revision 0x2b000620;\n  - Removal of cpuid:90672/0x07 (ADL-HX/S 8+8 C0) microcode (in microcode.dat)\n    at revision 0x38;\n  - Removal of cpuid:906A3/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in\n    microcode.dat) at revision 0x436;\n  - Removal of cpuid:B0671/0x32 (RPL-S B0) microcode (in microcode.dat) at\n    revision 0x12c;\n  - Removal of cpuid:B06A2/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in\n    microcode.dat) at revision 0x4124;\n  - Removal of cpuid:C06F1/0x87 (EMR-SP A0) microcode (in microcode.dat) at\n    revision 0x21000291;\n  - Removal of cpuid:C06F2/0x87 (EMR-SP A1) microcode (in microcode.dat) at\n    revision 0x21000291;\n  - Update of cpuid:50657/0xbf (CLX-SP/W/X B1/L1) microcode (in microcode.dat)\n    from revision 0x5003707 up to 0x5003901;\n  - Update of cpuid:5065B/0xbf (CPX-SP A1) microcode (in microcode.dat) from\n    revision 0x7002904 up to 0x7002b01;\n  - Update of cpuid:606A6/0x87 (ICX-SP D0) microcode (in microcode.dat) from\n    revision 0xd0003f5 up to 0xd000404;\n  - Update of cpuid:606C1/0x10 (ICL-D B0) microcode (in microcode.dat) from\n    revision 0x10002c0 up to 0x10002d0;\n  - Update of cpuid:706A8/0x01 (GLK-R R0) microcode (in microcode.dat) from\n    revision 0x24 up to 0x26;\n  - Update of cpuid:706E5/0x80 (ICL-U/Y D1) microcode (in microcode.dat) from\n    revision 0xc6 up to 0xca;\n  - Update of cpuid:806C1/0x80 (TGL-UP3/UP4 B1) microcode (in microcode.dat)\n    from revision 0xb8 up to 0xbc;\n  - Update of cpuid:806C2/0xc2 (TGL-R C0) microcode (in microcode.dat) from\n    revision 0x38 up to 0x3c;\n  - Update of cpuid:806D1/0xc2 (TGL-H R0) microcode (in microcode.dat) from\n    revision 0x52 up to 0x56;\n  - Update of cpuid:806EC/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode\n    (in microcode.dat) from revision 0xfc up to 0x100;\n  - Update of cpuid:806F4/0x10 microcode (in microcode.dat) from revision\n    0x2c0003e0 up to 0x2c0003f7;\n  - Update of cpuid:806F4/0x87 (SPR-SP E0/S1) microcode (in microcode.dat) from\n    revision 0x2b000620 up to 0x2b000639;\n  - Update of cpuid:806F5/0x10 (SPR-HBM B1) microcode (in microcode.dat) from\n    revision 0x2c0003e0 up to 0x2c0003f7;\n  - Update of cpuid:806F5/0x87 (SPR-SP E2) microcode (in microcode.dat) from\n    revision 0x2b000620 up to 0x2b000639;\n  - Update of cpuid:806F6/0x10 microcode (in microcode.dat) from revision\n    0x2c0003e0 up to 0x2c0003f7;\n  - Update of cpuid:806F6/0x87 (SPR-SP E3) microcode (in microcode.dat) from\n    revision 0x2b000620 up to 0x2b000639;\n  - Update of cpuid:806F7/0x87 (SPR-SP E4/S2) microcode (in microcode.dat) from\n    revision 0x2b000620 up to 0x2b000639;\n  - Update of cpuid:90675/0x07 (ADL-S 6+0 K0) microcode (in microcode.dat) from\n    revision 0x38 up to 0x3a;\n  - Update of cpuid:906A4/0x40 (AZB A0) microcode (in microcode.dat) from\n    revision 0x9 up to 0xa;\n  - Update of cpuid:906A4/0x80 (ADL-P 2+8 R0) microcode (in microcode.dat) from\n    revision 0x436 up to 0x437;\n  - Update of cpuid:906ED/0x22 (CFL-H/S/Xeon E R0) microcode (in microcode.dat)\n    from revision 0x102 up to 0x104;\n  - Update of cpuid:A0652/0x20 (CML-H R1) microcode (in microcode.dat) from\n    revision 0xfc up to 0x100;\n  - Update of cpuid:A0653/0x22 (CML-S 6+2 G1) microcode (in microcode.dat) from\n    revision 0xfc up to 0x100;\n  - Update of cpuid:A0655/0x22 (CML-S 10+2 Q0) microcode (in microcode.dat)\n    from revision 0xfc up to 0x100;\n  - Update of cpuid:A0660/0x80 (CML-U 6+2 A0) microcode (in microcode.dat) from\n    revision 0xfe up to 0x102;\n  - Update of cpuid:A0661/0x80 (CML-U 6+2 v2 K1) microcode (in microcode.dat)\n    from revision 0xfc up to 0x100;\n  - Update of cpuid:A0671/0x02 (RKL-S B0) microcode (in microcode.dat) from\n    revision 0x63 up to 0x64;\n  - Update of cpuid:A06A4/0xe6 (MTL-H/U C0) microcode (in microcode.dat) from\n    revision 0x20 up to 0x24;\n  - Update of cpuid:A06F3/0x01 (SRF-SP C0) microcode (in microcode.dat) from\n    revision 0x3000330 up to 0x3000341;\n  - Update of cpuid:B0674/0x32 microcode (in microcode.dat) from revision 0x12c\n    up to 0x12f;\n  - Update of cpuid:B06A3/0xe0 (RPL-U 2+8 Q0) microcode (in microcode.dat) from\n    revision 0x4124 up to 0x4128;\n  - Update of cpuid:B06A8/0xe0 microcode (in microcode.dat) from revision\n    0x4124 up to 0x4128;\n  - Update of cpuid:B06E0/0x19 (ADL-N A0) microcode (in microcode.dat) from\n    revision 0x1c up to 0x1d;\n  - Update of cpuid:B06F2/0x07 (ADL C0) microcode (in microcode.dat) from\n    revision 0x38 up to 0x3a;\n  - Update of cpuid:B06F5/0x07 (ADL C0) microcode (in microcode.dat) from\n    revision 0x38 up to 0x3a;\n  - Update of cpuid:B06F6/0x07 microcode (in microcode.dat) from revision 0x38\n    up to 0x3a;\n  - Update of cpuid:B06F7/0x07 microcode (in microcode.dat) from revision 0x38\n    up to 0x3a;\n  - Update of cpuid:C06F1/0x87 (EMR-SP A0) microcode (in microcode.dat) from\n    revision 0x21000291 up to 0x210002a9;","status":"published","published":"2025-08-05T08:10:29Z","modified":"2026-10-21T10:48:06.092197486Z","updated_at":"2026-11-02T15:43:42.025438Z"},{"id":"CLSA-2025-1754381695","title":"Fix of 8 CVEs","description":"   * New microcode update packages from upstream up to 2025-05-12:\n     - New microcodes:\n       sig 0x000a06d1, pf_mask 0x20, 2025-02-07, rev 0xa0000d1, size 1635328\n       sig 0x000a06d1, pf_mask 0x95, 2025-02-07, rev 0x10003a2, size 1664000\n       sig 0x000b0650, pf_mask 0x80, 2025-03-18, rev 0x000a, size 136192\n       sig 0x000b06d1, pf_mask 0x80, 2025-03-18, rev 0x011f, size 79872\n       sig 0x000c0652, pf_mask 0x82, 2025-03-20, rev 0x0118, size 90112\n       sig 0x000c0662, pf_mask 0x82, 2025-03-20, rev 0x0118, size 90112\n       sig 0x000c0664, pf_mask 0x82, 2025-03-20, rev 0x0118, size 90112\n       sig 0x000c06a2, pf_mask 0x82, 2025-03-20, rev 0x0118, size 90112\n     - Updated microcodes:\n       sig 0x00050657, pf_mask 0xbf, 2024-12-12, rev 0x5003901, size 39936\n       sig 0x0005065b, pf_mask 0xbf, 2024-12-12, rev 0x7002b01, size 30720\n       sig 0x000606a6, pf_mask 0x87, 2025-01-07, rev 0xd000404, size 309248\n       sig 0x000606c1, pf_mask 0x10, 2025-01-07, rev 0x10002d0, size 300032\n       sig 0x000706a8, pf_mask 0x01, 2024-12-05, rev 0x0026, size 76800\n       sig 0x000706e5, pf_mask 0x80, 2025-01-07, rev 0x00ca, size 115712\n       sig 0x000806c1, pf_mask 0x80, 2024-12-01, rev 0x00bc, size 112640\n       sig 0x000806c2, pf_mask 0xc2, 2024-12-01, rev 0x003c, size 99328\n       sig 0x000806d1, pf_mask 0xc2, 2024-12-11, rev 0x0056, size 105472\n       sig 0x000806ec, pf_mask 0x94, 2024-11-17, rev 0x0100, size 106496\n       sig 0x000806f4, pf_mask 0x10, 2025-01-28, rev 0x2c0003f7, size 624640\n       sig 0x000806f4, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x000806f5, pf_mask 0x10, 2025-01-28, rev 0x2c0003f7, size 624640\n       sig 0x000806f5, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x000806f6, pf_mask 0x10, 2025-01-28, rev 0x2c0003f7, size 624640\n       sig 0x000806f6, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x000806f7, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x000806f8, pf_mask 0x10, 2025-01-28, rev 0x2c0003f7, size 624640\n       sig 0x000806f8, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x00090672, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x00090675, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000906a3, pf_mask 0x80, 2024-12-12, rev 0x0437, size 224256\n       sig 0x000906a4, pf_mask 0x40, 2024-12-06, rev 0x000a, size 119808\n       sig 0x000906a4, pf_mask 0x80, 2024-12-12, rev 0x0437, size 224256\n       sig 0x000906ed, pf_mask 0x22, 2024-11-14, rev 0x0104, size 106496\n       sig 0x000a0652, pf_mask 0x20, 2024-11-14, rev 0x0100, size 97280\n       sig 0x000a0653, pf_mask 0x22, 2024-11-14, rev 0x0100, size 98304\n       sig 0x000a0655, pf_mask 0x22, 2024-11-14, rev 0x0100, size 97280\n       sig 0x000a0660, pf_mask 0x80, 2024-11-14, rev 0x0102, size 98304\n       sig 0x000a0661, pf_mask 0x80, 2024-11-14, rev 0x0100, size 97280\n       sig 0x000a0671, pf_mask 0x02, 2024-12-01, rev 0x0064, size 108544\n       sig 0x000a06a4, pf_mask 0xe6, 2025-02-13, rev 0x0024, size 140288\n       sig 0x000a06f3, pf_mask 0x01, 2025-02-10, rev 0x3000341, size 1542144\n       sig 0x000b0671, pf_mask 0x32, 2025-03-17, rev 0x012f, size 219136\n       sig 0x000b0674, pf_mask 0x32, 2025-03-17, rev 0x012f, size 219136\n       sig 0x000b06a2, pf_mask 0xe0, 2025-01-15, rev 0x4128, size 224256\n       sig 0x000b06a3, pf_mask 0xe0, 2025-01-15, rev 0x4128, size 224256\n       sig 0x000b06a8, pf_mask 0xe0, 2025-01-15, rev 0x4128, size 224256\n       sig 0x000b06e0, pf_mask 0x19, 2024-12-06, rev 0x001d, size 139264\n       sig 0x000b06f2, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000b06f5, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000b06f6, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000b06f7, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000c06f1, pf_mask 0x87, 2025-03-14, rev 0x210002a9, size 563200\n       sig 0x000c06f2, pf_mask 0x87, 2025-03-14, rev 0x210002a9, size 563200\n     - Removed microcodes:\n       sig 0x00050656, pf_mask 0xbf, 2023-07-28, rev 0x4003605, size 3891\n   * SECURITY UPDATE:\n     - CVE-2024-28956, INTEL-SA-01153\n     - CVE-2025-20054, INTEL-SA-01244\n     - CVE-2025-20103, INTEL-SA-01244\n     - CVE-2024-43420, INTEL-SA-01247\n     - CVE-2024-45332, INTEL-SA-01247\n     - CVE-2025-20623, INTEL-SA-01247\n     - CVE-2025-20012, INTEL-SA-01322\n     - CVE-2025-24495, INTEL-SA-01322","status":"published","published":"2025-08-05T08:15:00Z","modified":"2026-06-04T10:04:03.370564989Z","updated_at":"2026-11-02T15:43:42.025438Z"},{"id":"CLSA-2025-1754381806","title":"Fix of 8 CVEs","description":"   * New microcode update packages from upstream up to 2025-05-12:\n     - New microcodes:\n       sig 0x000a06d1, pf_mask 0x20, 2025-02-07, rev 0xa0000d1, size 1635328\n       sig 0x000a06d1, pf_mask 0x95, 2025-02-07, rev 0x10003a2, size 1664000\n       sig 0x000b0650, pf_mask 0x80, 2025-03-18, rev 0x000a, size 136192\n       sig 0x000b06d1, pf_mask 0x80, 2025-03-18, rev 0x011f, size 79872\n       sig 0x000c0652, pf_mask 0x82, 2025-03-20, rev 0x0118, size 90112\n       sig 0x000c0662, pf_mask 0x82, 2025-03-20, rev 0x0118, size 90112\n       sig 0x000c0664, pf_mask 0x82, 2025-03-20, rev 0x0118, size 90112\n       sig 0x000c06a2, pf_mask 0x82, 2025-03-20, rev 0x0118, size 90112\n     - Updated microcodes:\n       sig 0x00050657, pf_mask 0xbf, 2024-12-12, rev 0x5003901, size 39936\n       sig 0x0005065b, pf_mask 0xbf, 2024-12-12, rev 0x7002b01, size 30720\n       sig 0x000606a6, pf_mask 0x87, 2025-01-07, rev 0xd000404, size 309248\n       sig 0x000606c1, pf_mask 0x10, 2025-01-07, rev 0x10002d0, size 300032\n       sig 0x000706a8, pf_mask 0x01, 2024-12-05, rev 0x0026, size 76800\n       sig 0x000706e5, pf_mask 0x80, 2025-01-07, rev 0x00ca, size 115712\n       sig 0x000806c1, pf_mask 0x80, 2024-12-01, rev 0x00bc, size 112640\n       sig 0x000806c2, pf_mask 0xc2, 2024-12-01, rev 0x003c, size 99328\n       sig 0x000806d1, pf_mask 0xc2, 2024-12-11, rev 0x0056, size 105472\n       sig 0x000806ec, pf_mask 0x94, 2024-11-17, rev 0x0100, size 106496\n       sig 0x000806f4, pf_mask 0x10, 2025-01-28, rev 0x2c0003f7, size 624640\n       sig 0x000806f4, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x000806f5, pf_mask 0x10, 2025-01-28, rev 0x2c0003f7, size 624640\n       sig 0x000806f5, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x000806f6, pf_mask 0x10, 2025-01-28, rev 0x2c0003f7, size 624640\n       sig 0x000806f6, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x000806f7, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x000806f8, pf_mask 0x10, 2025-01-28, rev 0x2c0003f7, size 624640\n       sig 0x000806f8, pf_mask 0x87, 2025-01-28, rev 0x2b000639, size 591872\n       sig 0x00090672, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x00090675, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000906a3, pf_mask 0x80, 2024-12-12, rev 0x0437, size 224256\n       sig 0x000906a4, pf_mask 0x40, 2024-12-06, rev 0x000a, size 119808\n       sig 0x000906a4, pf_mask 0x80, 2024-12-12, rev 0x0437, size 224256\n       sig 0x000906ed, pf_mask 0x22, 2024-11-14, rev 0x0104, size 106496\n       sig 0x000a0652, pf_mask 0x20, 2024-11-14, rev 0x0100, size 97280\n       sig 0x000a0653, pf_mask 0x22, 2024-11-14, rev 0x0100, size 98304\n       sig 0x000a0655, pf_mask 0x22, 2024-11-14, rev 0x0100, size 97280\n       sig 0x000a0660, pf_mask 0x80, 2024-11-14, rev 0x0102, size 98304\n       sig 0x000a0661, pf_mask 0x80, 2024-11-14, rev 0x0100, size 97280\n       sig 0x000a0671, pf_mask 0x02, 2024-12-01, rev 0x0064, size 108544\n       sig 0x000a06a4, pf_mask 0xe6, 2025-02-13, rev 0x0024, size 140288\n       sig 0x000a06f3, pf_mask 0x01, 2025-02-10, rev 0x3000341, size 1542144\n       sig 0x000b0671, pf_mask 0x32, 2025-03-17, rev 0x012f, size 219136\n       sig 0x000b0674, pf_mask 0x32, 2025-03-17, rev 0x012f, size 219136\n       sig 0x000b06a2, pf_mask 0xe0, 2025-01-15, rev 0x4128, size 224256\n       sig 0x000b06a3, pf_mask 0xe0, 2025-01-15, rev 0x4128, size 224256\n       sig 0x000b06a8, pf_mask 0xe0, 2025-01-15, rev 0x4128, size 224256\n       sig 0x000b06e0, pf_mask 0x19, 2024-12-06, rev 0x001d, size 139264\n       sig 0x000b06f2, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000b06f5, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000b06f6, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000b06f7, pf_mask 0x07, 2024-12-12, rev 0x003a, size 226304\n       sig 0x000c06f1, pf_mask 0x87, 2025-03-14, rev 0x210002a9, size 563200\n       sig 0x000c06f2, pf_mask 0x87, 2025-03-14, rev 0x210002a9, size 563200\n     - Removed microcodes:\n       sig 0x00050656, pf_mask 0xbf, 2023-07-28, rev 0x4003605, size 38912\n   * SECURITY UPDATE:\n     - CVE-2024-28956, INTEL-SA-01153\n     - CVE-2025-20054, INTEL-SA-01244\n     - CVE-2025-20103, INTEL-SA-01244\n     - CVE-2024-43420, INTEL-SA-01247\n     - CVE-2024-45332, INTEL-SA-01247\n     - CVE-2025-20623, INTEL-SA-01247\n     - CVE-2025-20012, INTEL-SA-01322\n     - CVE-2025-24495, INTEL-SA-01322","status":"published","published":"2025-08-05T08:16:50Z","modified":"2026-06-04T10:03:33.80619359Z","updated_at":"2026-11-02T15:43:42.025438Z"},{"id":"CLSA-2025-1754381826","title":"microcode_ctl: Fix of 8 CVEs","description":"- Update Intel CPU microcode to 20250512 release, addresses\n  CVE-2025-20012, CVE-2025-24495, CVE-2024-43420, CVE-2025-20623, CVE-2024-45332,\n  CVE-2024-28956, CVE-2025-20103, CVE-2025-20054:\n  - Addition of cpuid:806F8/0x10 (SPR-HBM B3) microcode (in microcode.dat) at\n    revision 0x2c0003f7;\n  - Addition of cpuid:806F8/0x87 (SPR-SP E5/S3) microcode (in microcode.dat) at\n    revision 0x2b000639;\n  - Addition of cpuid:90672/0x07 (ADL-HX/S 8+8 C0) microcode (in microcode.dat)\n    at revision 0x3a;\n  - Addition of cpuid:906A3/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in\n    microcode.dat) at revision 0x437;\n  - Addition of cpuid:A06D1/0x20 (GNR-AP/SP H0) microcode (in microcode.dat) at\n    revision 0xa0000d1;\n  - Addition of cpuid:A06D1/0x95 (GNR-AP/SP B0) microcode (in microcode.dat) at\n    revision 0x10003a2;\n  - Addition of cpuid:B0650/0x80 (ARL-U A1) microcode (in microcode.dat) at\n    revision 0xa;\n  - Addition of cpuid:B0671/0x32 (RPL-S B0) microcode (in microcode.dat) at\n    revision 0x12f;\n  - Addition of cpuid:B06A2/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in\n    microcode.dat) at revision 0x4128;\n  - Addition of cpuid:B06D1/0x80 (LNL B0) microcode (in microcode.dat) at\n    revision 0x11f;\n  - Addition of cpuid:C0652/0x82 (ARL-H A1) microcode (in microcode.dat) at\n    revision 0x118;\n  - Addition of cpuid:C0662/0x82 (ARL-HX 8P/S B0) microcode (in microcode.dat)\n    at revision 0x118;\n  - Addition of cpuid:C0664/0x82 microcode (in microcode.dat) at revision\n    0x118;\n  - Addition of cpuid:C06A2/0x82 microcode (in microcode.dat) at revision\n    0x118;\n  - Addition of cpuid:C06F2/0x87 (EMR-SP A1) microcode (in microcode.dat) at\n    revision 0x210002a9;\n  - Removal of cpuid:50656/0xbf (CLX-SP B0) microcode (in microcode.dat) at\n    revision 0x4003605;\n  - Removal of cpuid:806F8/0x10 (SPR-HBM B3) microcode (in microcode.dat) at\n    revision 0x2c0003e0;\n  - Removal of cpuid:806F8/0x87 (SPR-SP E5/S3) microcode (in microcode.dat) at\n    revision 0x2b000620;\n  - Removal of cpuid:90672/0x07 (ADL-HX/S 8+8 C0) microcode (in microcode.dat)\n    at revision 0x38;\n  - Removal of cpuid:906A3/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in\n    microcode.dat) at revision 0x436;\n  - Removal of cpuid:B0671/0x32 (RPL-S B0) microcode (in microcode.dat) at\n    revision 0x12c;\n  - Removal of cpuid:B06A2/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in\n    microcode.dat) at revision 0x4124;\n  - Removal of cpuid:C06F1/0x87 (EMR-SP A0) microcode (in microcode.dat) at\n    revision 0x21000291;\n  - Removal of cpuid:C06F2/0x87 (EMR-SP A1) microcode (in microcode.dat) at\n    revision 0x21000291;\n  - Update of cpuid:50657/0xbf (CLX-SP/W/X B1/L1) microcode (in microcode.dat)\n    from revision 0x5003707 up to 0x5003901;\n  - Update of cpuid:5065B/0xbf (CPX-SP A1) microcode (in microcode.dat) from\n    revision 0x7002904 up to 0x7002b01;\n  - Update of cpuid:606A6/0x87 (ICX-SP D0) microcode (in microcode.dat) from\n    revision 0xd0003f5 up to 0xd000404;\n  - Update of cpuid:606C1/0x10 (ICL-D B0) microcode (in microcode.dat) from\n    revision 0x10002c0 up to 0x10002d0;\n  - Update of cpuid:706A8/0x01 (GLK-R R0) microcode (in microcode.dat) from\n    revision 0x24 up to 0x26;\n  - Update of cpuid:706E5/0x80 (ICL-U/Y D1) microcode (in microcode.dat) from\n    revision 0xc6 up to 0xca;\n  - Update of cpuid:806C1/0x80 (TGL-UP3/UP4 B1) microcode (in microcode.dat)\n    from revision 0xb8 up to 0xbc;\n  - Update of cpuid:806C2/0xc2 (TGL-R C0) microcode (in microcode.dat) from\n    revision 0x38 up to 0x3c;\n  - Update of cpuid:806D1/0xc2 (TGL-H R0) microcode (in microcode.dat) from\n    revision 0x52 up to 0x56;\n  - Update of cpuid:806EC/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode\n    (in microcode.dat) from revision 0xfc up to 0x100;\n  - Update of cpuid:806F4/0x10 microcode (in microcode.dat) from revision\n    0x2c0003e0 up to 0x2c0003f7;\n  - Update of cpuid:806F4/0x87 (SPR-SP E0/S1) microcode (in microcode.dat) from\n    revision 0x2b000620 up to 0x2b000639;\n  - Update of cpuid:806F5/0x10 (SPR-HBM B1) microcode (in microcode.dat) from\n    revision 0x2c0003e0 up to 0x2c0003f7;\n  - Update of cpuid:806F5/0x87 (SPR-SP E2) microcode (in microcode.dat) from\n    revision 0x2b000620 up to 0x2b000639;\n  - Update of cpuid:806F6/0x10 microcode (in microcode.dat) from revision\n    0x2c0003e0 up to 0x2c0003f7;\n  - Update of cpuid:806F6/0x87 (SPR-SP E3) microcode (in microcode.dat) from\n    revision 0x2b000620 up to 0x2b000639;\n  - Update of cpuid:806F7/0x87 (SPR-SP E4/S2) microcode (in microcode.dat) from\n    revision 0x2b000620 up to 0x2b000639;\n  - Update of cpuid:90675/0x07 (ADL-S 6+0 K0) microcode (in microcode.dat) from\n    revision 0x38 up to 0x3a;\n  - Update of cpuid:906A4/0x40 (AZB A0) microcode (in microcode.dat) from\n    revision 0x9 up to 0xa;\n  - Update of cpuid:906A4/0x80 (ADL-P 2+8 R0) microcode (in microcode.dat) from\n    revision 0x436 up to 0x437;\n  - Update of cpuid:906ED/0x22 (CFL-H/S/Xeon E R0) microcode (in microcode.dat)\n    from revision 0x102 up to 0x104;\n  - Update of cpuid:A0652/0x20 (CML-H R1) microcode (in microcode.dat) from\n    revision 0xfc up to 0x100;\n  - Update of cpuid:A0653/0x22 (CML-S 6+2 G1) microcode (in microcode.dat) from\n    revision 0xfc up to 0x100;\n  - Update of cpuid:A0655/0x22 (CML-S 10+2 Q0) microcode (in microcode.dat)\n    from revision 0xfc up to 0x100;\n  - Update of cpuid:A0660/0x80 (CML-U 6+2 A0) microcode (in microcode.dat) from\n    revision 0xfe up to 0x102;\n  - Update of cpuid:A0661/0x80 (CML-U 6+2 v2 K1) microcode (in microcode.dat)\n    from revision 0xfc up to 0x100;\n  - Update of cpuid:A0671/0x02 (RKL-S B0) microcode (in microcode.dat) from\n    revision 0x63 up to 0x64;\n  - Update of cpuid:A06A4/0xe6 (MTL-H/U C0) microcode (in microcode.dat) from\n    revision 0x20 up to 0x24;\n  - Update of cpuid:A06F3/0x01 (SRF-SP C0) microcode (in microcode.dat) from\n    revision 0x3000330 up to 0x3000341;\n  - Update of cpuid:B0674/0x32 microcode (in microcode.dat) from revision 0x12c\n    up to 0x12f;\n  - Update of cpuid:B06A3/0xe0 (RPL-U 2+8 Q0) microcode (in microcode.dat) from\n    revision 0x4124 up to 0x4128;\n  - Update of cpuid:B06A8/0xe0 microcode (in microcode.dat) from revision\n    0x4124 up to 0x4128;\n  - Update of cpuid:B06E0/0x19 (ADL-N A0) microcode (in microcode.dat) from\n    revision 0x1c up to 0x1d;\n  - Update of cpuid:B06F2/0x07 (ADL C0) microcode (in microcode.dat) from\n    revision 0x38 up to 0x3a;\n  - Update of cpuid:B06F5/0x07 (ADL C0) microcode (in microcode.dat) from\n    revision 0x38 up to 0x3a;\n  - Update of cpuid:B06F6/0x07 microcode (in microcode.dat) from revision 0x38\n    up to 0x3a;\n  - Update of cpuid:B06F7/0x07 microcode (in microcode.dat) from revision 0x38\n    up to 0x3a;\n  - Update of cpuid:C06F1/0x87 (EMR-SP A0) microcode (in microcode.dat) from\n    revision 0x21000291 up to 0x210002a9;","status":"published","published":"2025-08-05T08:17:11Z","modified":"2026-10-21T10:48:08.492753078Z","updated_at":"2026-11-02T15:43:42.025438Z"},{"id":"CVE-2025-20103","description":"Insufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial of service via local access.","status":"published","published":"2025-05-13T21:16:07Z","modified":"2026-04-16T04:32:41.24698679Z","updated_at":"2026-11-02T15:44:46.665428Z"},{"id":"DLA-4170-1","title":"intel-microcode - security update","status":"published","published":"2025-05-18T00:00:00Z","modified":"2026-03-09T01:19:46.96867Z","updated_at":"2026-11-02T15:46:12.7027Z"},{"id":"DSA-5924-1","title":"intel-microcode - security update","status":"published","published":"2025-05-23T00:00:00Z","modified":"2026-03-09T02:09:36.170796Z","updated_at":"2026-11-02T15:46:18.296714Z"},{"id":"MGASA-2025-0160","title":"Updated microcode packages fix security vulnerabilities","description":"Exposure of Sensitive Information in Shared Microarchitectural\nStructures during Transient Execution for some Intel® Processors may\nallow an authenticated user to potentially enable information disclosure\nvia local access. (CVE-2024-28956)\nInsufficient resource pool in the core management mechanism for some\nIntel® Processors may allow an authenticated user to potentially enable\ndenial of service via local access. (CVE-2025-20103)\nUncaught exception in the core management mechanism for some Intel®\nProcessors may allow an authenticated user to potentially enable denial\nof service via local access. (CVE-2025-20054)\nExposure of sensitive information caused by shared microarchitectural\npredictor state that influences transient execution for some Intel Atom®\nprocessors may allow an authenticated user to potentially enable\ninformation disclosure via local access. (CVE-2024-43420)\nExposure of sensitive information caused by shared microarchitectural\npredictor state that influences transient execution for some Intel®\nCore™ processors (10th Generation) may allow an authenticated user to\npotentially enable information disclosure via local access.\n(CVE-2025-20623)\nExposure of sensitive information caused by shared microarchitectural\npredictor state that influences transient execution in the indirect\nbranch predictors for some Intel® Processors may allow an authenticated\nuser to potentially enable information disclosure via local access.\n(CVE-2024-45332)\nIncorrect initialization of resource in the branch prediction unit for\nsome Intel® Core™ Ultra Processors may allow an authenticated user to\npotentially enable information disclosure via local access.\n(CVE-2025-24495)\nIncorrect behavior order for some Intel® Core™ Ultra Processors may\nallow an unauthenticated user to potentially enable information\ndisclosure via physical access. (CVE-2025-20012)\n","status":"published","published":"2025-05-23T20:06:42Z","modified":"2026-04-16T04:41:42.385455239Z","updated_at":"2026-11-02T15:49:43.178336Z"},{"id":"openSUSE-SU-2025:15093-1","title":"ucode-intel-20250512-1.1 on GA media","description":"These are all security issues fixed in the ucode-intel-20250512-1.1 package on the GA media of openSUSE Tumbleweed.","status":"published","published":"2025-05-15T00:00:00Z","modified":"2026-03-23T04:53:24.480748Z","updated_at":"2026-11-02T16:58:37.399567Z"},{"id":"SUSE-SU-2025:01650-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\nIntel CPU Microcode was updated to the 20250512 release (bsc#1243123)\n  \n- CVE-2024-28956: Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20103: Insufficient resource pool in the core management mechanism for some Intel Processors may allow an authenticated user to potentially enable denial of service via local access.\n- CVE-2025-20054: Uncaught exception in the core management mechanism for some Intel Processors may allow an authenticated user to potentially enable denial of service via local access.\n- CVE-2024-43420: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Atom processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20623: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Core processors (10th Generation) may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2024-45332: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some Intel Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-24495: Incorrect initialization of resource in the branch prediction unit for some Intel Core Ultra Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20012: Incorrect behavior order for some Intel Core Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via physical access.\n- Updates for functional issues.  \n    \n- New Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ARL-U          | A1       | 06-b5-00/80 |          | 0000000a | Core Ultra Processor (Series2)\n  | ARL-S/HX (8P)  | B0       | 06-c6-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | ARL-H          | A1       | 06-c5-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | GNR-AP/SP      | B0       | 06-ad-01/95 |          | 010003a2 | Xeon Scalable Gen6\n  | GNR-AP/SP      | H0       | 06-ad-01/20 |          | 0a0000d1 | Xeon Scalable Gen6\n  | LNL            | B0       | 06-bd-01/80 |          | 0000011f | Core Ultra 200 V Series Processor\n\n- Updated Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ADL            | C0       | 06-97-02/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | H0       | 06-97-05/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | L0       | 06-9a-03/80 | 00000436 | 00000437 | Core Gen12\n  | ADL            | R0       | 06-9a-04/80 | 00000436 | 00000437 | Core Gen12 \n  | ADL-N          | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E\n  | AML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | AZB            | A0/R0    | 06-9a-04/40 | 00000009 | 0000000a | Intel(R) Atom(R) C1100\n  | CFL-H          | R0       | 06-9e-0d/22 | 00000102 | 00000104 | Core Gen9 Mobile\n  | CLX-SP         | B1       | 06-55-07/bf | 05003707 | 05003901 | Xeon Scalable Gen2\n  | CML-H          | R1       | 06-a5-02/20 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-S102       | Q0       | 06-a5-05/22 | 000000fc | 00000100 | Core Gen10\n  | CML-S62        | G1       | 06-a5-03/22 | 000000fc | 00000100 | Core Gen10\n  | CML-U42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-U62 V1     | A0       | 06-a6-00/80 | 000000fe | 00000102 | Core Gen10 Mobile\n  | CML-U62 V2     | K1       | 06-a6-01/80 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CPX-SP         | A1       | 06-55-0b/bf | 07002904 | 07002b01 | Xeon Scalable Gen3\n  | EMR-SP         | A1       | 06-cf-02/87 | 21000291 | 210002a9 | Xeon Scalable Gen5\n  | GLK-R          | R0       | 06-7a-08/01 | 00000024 | 00000026 | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120\n  | ICL-D          | B0       | 06-6c-01/10 | 010002c0 | 010002d0 | Xeon D-17xx, D-27xx\n  | ICL-U/Y        | D1       | 06-7e-05/80 | 000000c6 | 000000ca | Core Gen10 Mobile\n  | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d0003f5 | 0d000404 | Xeon Scalable Gen3\n  | MTL            | C0       | 06-aa-04/e6 | 00000020 | 00000024 | Core Ultra Processor\n  | RKL-S          | B0       | 06-a7-01/02 | 00000063 | 00000064 | Core Gen11\n  | RPL-E/HX/S     | B0       | 06-b7-01/32 | 0000012c | 0000012f | Core Gen13/Gen14\n  | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004124 | 00004128 | Core Gen13\n  | RPL-HX/S       | C0       | 06-bf-02/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-S          | H0       | 06-bf-05/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004124 | 00004128 | Core Gen13\n  | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003e0 | 2c0003f7 | Xeon Max\n  | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SRF-SP         | C0       | 06-af-03/01 | 03000330 | 03000341 | Xeon 6700-Series Processors with E-Cores\n  | TGL            | B0/B1    | 06-8c-01/80 | 000000b8 | 000000bc | Core Gen11 Mobile\n  | TGL-H          | R0       | 06-8d-01/c2 | 00000052 | 00000056 | Core Gen11 Mobile\n  | TGL-R          | C0       | 06-8c-02/c2 | 00000038 | 0000003c | Core Gen11 Mobile\n  | TWL            | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E\n  | WHL-U          | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen8 Mobile\n","status":"published","published":"2025-05-22T08:51:44Z","modified":"2026-03-23T04:46:18.860282Z","updated_at":"2026-11-02T15:53:56.123059Z"},{"id":"SUSE-SU-2025:01651-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\nIntel CPU Microcode was updated to the 20250512 release (bsc#1243123)\n  \n- CVE-2024-28956: Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20103: Insufficient resource pool in the core management mechanism for some Intel Processors may allow an authenticated user to potentially enable denial of service via local access.\n- CVE-2025-20054: Uncaught exception in the core management mechanism for some Intel Processors may allow an authenticated user to potentially enable denial of service via local access.\n- CVE-2024-43420: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Atom processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20623: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Core processors (10th Generation) may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2024-45332: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some Intel Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-24495: Incorrect initialization of resource in the branch prediction unit for some Intel Core Ultra Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20012: Incorrect behavior order for some Intel Core Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via physical access.\n- Updates for functional issues.  \n    \n- New Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ARL-U          | A1       | 06-b5-00/80 |          | 0000000a | Core Ultra Processor (Series2)\n  | ARL-S/HX (8P)  | B0       | 06-c6-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | ARL-H          | A1       | 06-c5-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | GNR-AP/SP      | B0       | 06-ad-01/95 |          | 010003a2 | Xeon Scalable Gen6\n  | GNR-AP/SP      | H0       | 06-ad-01/20 |          | 0a0000d1 | Xeon Scalable Gen6\n  | LNL            | B0       | 06-bd-01/80 |          | 0000011f | Core Ultra 200 V Series Processor\n\n- Updated Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ADL            | C0       | 06-97-02/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | H0       | 06-97-05/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | L0       | 06-9a-03/80 | 00000436 | 00000437 | Core Gen12\n  | ADL            | R0       | 06-9a-04/80 | 00000436 | 00000437 | Core Gen12 \n  | ADL-N          | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E\n  | AML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | AZB            | A0/R0    | 06-9a-04/40 | 00000009 | 0000000a | Intel(R) Atom(R) C1100\n  | CFL-H          | R0       | 06-9e-0d/22 | 00000102 | 00000104 | Core Gen9 Mobile\n  | CLX-SP         | B1       | 06-55-07/bf | 05003707 | 05003901 | Xeon Scalable Gen2\n  | CML-H          | R1       | 06-a5-02/20 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-S102       | Q0       | 06-a5-05/22 | 000000fc | 00000100 | Core Gen10\n  | CML-S62        | G1       | 06-a5-03/22 | 000000fc | 00000100 | Core Gen10\n  | CML-U42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-U62 V1     | A0       | 06-a6-00/80 | 000000fe | 00000102 | Core Gen10 Mobile\n  | CML-U62 V2     | K1       | 06-a6-01/80 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CPX-SP         | A1       | 06-55-0b/bf | 07002904 | 07002b01 | Xeon Scalable Gen3\n  | EMR-SP         | A1       | 06-cf-02/87 | 21000291 | 210002a9 | Xeon Scalable Gen5\n  | GLK-R          | R0       | 06-7a-08/01 | 00000024 | 00000026 | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120\n  | ICL-D          | B0       | 06-6c-01/10 | 010002c0 | 010002d0 | Xeon D-17xx, D-27xx\n  | ICL-U/Y        | D1       | 06-7e-05/80 | 000000c6 | 000000ca | Core Gen10 Mobile\n  | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d0003f5 | 0d000404 | Xeon Scalable Gen3\n  | MTL            | C0       | 06-aa-04/e6 | 00000020 | 00000024 | Core Ultra Processor\n  | RKL-S          | B0       | 06-a7-01/02 | 00000063 | 00000064 | Core Gen11\n  | RPL-E/HX/S     | B0       | 06-b7-01/32 | 0000012c | 0000012f | Core Gen13/Gen14\n  | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004124 | 00004128 | Core Gen13\n  | RPL-HX/S       | C0       | 06-bf-02/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-S          | H0       | 06-bf-05/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004124 | 00004128 | Core Gen13\n  | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003e0 | 2c0003f7 | Xeon Max\n  | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SRF-SP         | C0       | 06-af-03/01 | 03000330 | 03000341 | Xeon 6700-Series Processors with E-Cores\n  | TGL            | B0/B1    | 06-8c-01/80 | 000000b8 | 000000bc | Core Gen11 Mobile\n  | TGL-H          | R0       | 06-8d-01/c2 | 00000052 | 00000056 | Core Gen11 Mobile\n  | TGL-R          | C0       | 06-8c-02/c2 | 00000038 | 0000003c | Core Gen11 Mobile\n  | TWL            | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E\n  | WHL-U          | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen8 Mobile\n","status":"published","published":"2025-05-22T08:52:40Z","modified":"2026-03-23T04:47:34.996491Z","updated_at":"2026-11-02T15:53:56.123059Z"},{"id":"SUSE-SU-2025:01651-2","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\nIntel CPU Microcode was updated to the 20250512 release (bsc#1243123)\n  \n- CVE-2024-28956: Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20103: Insufficient resource pool in the core management mechanism for some Intel Processors may allow an authenticated user to potentially enable denial of service via local access.\n- CVE-2025-20054: Uncaught exception in the core management mechanism for some Intel Processors may allow an authenticated user to potentially enable denial of service via local access.\n- CVE-2024-43420: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Atom processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20623: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Core processors (10th Generation) may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2024-45332: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some Intel Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-24495: Incorrect initialization of resource in the branch prediction unit for some Intel Core Ultra Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20012: Incorrect behavior order for some Intel Core Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via physical access.\n- Updates for functional issues.  \n    \n- New Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ARL-U          | A1       | 06-b5-00/80 |          | 0000000a | Core Ultra Processor (Series2)\n  | ARL-S/HX (8P)  | B0       | 06-c6-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | ARL-H          | A1       | 06-c5-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | GNR-AP/SP      | B0       | 06-ad-01/95 |          | 010003a2 | Xeon Scalable Gen6\n  | GNR-AP/SP      | H0       | 06-ad-01/20 |          | 0a0000d1 | Xeon Scalable Gen6\n  | LNL            | B0       | 06-bd-01/80 |          | 0000011f | Core Ultra 200 V Series Processor\n\n- Updated Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ADL            | C0       | 06-97-02/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | H0       | 06-97-05/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | L0       | 06-9a-03/80 | 00000436 | 00000437 | Core Gen12\n  | ADL            | R0       | 06-9a-04/80 | 00000436 | 00000437 | Core Gen12 \n  | ADL-N          | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E\n  | AML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | AZB            | A0/R0    | 06-9a-04/40 | 00000009 | 0000000a | Intel(R) Atom(R) C1100\n  | CFL-H          | R0       | 06-9e-0d/22 | 00000102 | 00000104 | Core Gen9 Mobile\n  | CLX-SP         | B1       | 06-55-07/bf | 05003707 | 05003901 | Xeon Scalable Gen2\n  | CML-H          | R1       | 06-a5-02/20 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-S102       | Q0       | 06-a5-05/22 | 000000fc | 00000100 | Core Gen10\n  | CML-S62        | G1       | 06-a5-03/22 | 000000fc | 00000100 | Core Gen10\n  | CML-U42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-U62 V1     | A0       | 06-a6-00/80 | 000000fe | 00000102 | Core Gen10 Mobile\n  | CML-U62 V2     | K1       | 06-a6-01/80 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CPX-SP         | A1       | 06-55-0b/bf | 07002904 | 07002b01 | Xeon Scalable Gen3\n  | EMR-SP         | A1       | 06-cf-02/87 | 21000291 | 210002a9 | Xeon Scalable Gen5\n  | GLK-R          | R0       | 06-7a-08/01 | 00000024 | 00000026 | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120\n  | ICL-D          | B0       | 06-6c-01/10 | 010002c0 | 010002d0 | Xeon D-17xx, D-27xx\n  | ICL-U/Y        | D1       | 06-7e-05/80 | 000000c6 | 000000ca | Core Gen10 Mobile\n  | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d0003f5 | 0d000404 | Xeon Scalable Gen3\n  | MTL            | C0       | 06-aa-04/e6 | 00000020 | 00000024 | Core Ultra Processor\n  | RKL-S          | B0       | 06-a7-01/02 | 00000063 | 00000064 | Core Gen11\n  | RPL-E/HX/S     | B0       | 06-b7-01/32 | 0000012c | 0000012f | Core Gen13/Gen14\n  | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004124 | 00004128 | Core Gen13\n  | RPL-HX/S       | C0       | 06-bf-02/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-S          | H0       | 06-bf-05/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004124 | 00004128 | Core Gen13\n  | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003e0 | 2c0003f7 | Xeon Max\n  | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SRF-SP         | C0       | 06-af-03/01 | 03000330 | 03000341 | Xeon 6700-Series Processors with E-Cores\n  | TGL            | B0/B1    | 06-8c-01/80 | 000000b8 | 000000bc | Core Gen11 Mobile\n  | TGL-H          | R0       | 06-8d-01/c2 | 00000052 | 00000056 | Core Gen11 Mobile\n  | TGL-R          | C0       | 06-8c-02/c2 | 00000038 | 0000003c | Core Gen11 Mobile\n  | TWL            | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E\n  | WHL-U          | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen8 Mobile\n","status":"published","published":"2025-05-29T09:40:21Z","modified":"2026-03-23T04:48:26.768301Z","updated_at":"2026-11-02T15:53:56.123059Z"},{"id":"SUSE-SU-2025:1567-1","title":"Security update for microcode_ctl","description":"This update for microcode_ctl fixes the following issues:\n\nIntel CPU Microcode was updated to the 20250512 release (bsc#1243123)\n  \n- CVE-2024-28956: Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20103: Insufficient resource pool in the core management mechanism for some Intel Processors may allow an authenticated user to potentially enable denial of service via local access.\n- CVE-2025-20054: Uncaught exception in the core management mechanism for some Intel Processors may allow an authenticated user to potentially enable denial of service via local access.\n- CVE-2024-43420: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Atom processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20623: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Core processors (10th Generation) may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2024-45332: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some Intel Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-24495: Incorrect initialization of resource in the branch prediction unit for some Intel Core Ultra Processors may allow an authenticated user to potentially enable information disclosure via local access.\n- CVE-2025-20012: Incorrect behavior order for some Intel Core Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via physical access.\n- Updates for functional issues.  \n    \n- New Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ARL-U          | A1       | 06-b5-00/80 |          | 0000000a | Core Ultra Processor (Series2)\n  | ARL-S/HX (8P)  | B0       | 06-c6-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | ARL-H          | A1       | 06-c5-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | GNR-AP/SP      | B0       | 06-ad-01/95 |          | 010003a2 | Xeon Scalable Gen6\n  | GNR-AP/SP      | H0       | 06-ad-01/20 |          | 0a0000d1 | Xeon Scalable Gen6\n  | LNL            | B0       | 06-bd-01/80 |          | 0000011f | Core Ultra 200 V Series Processor\n\n- Updated Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ADL            | C0       | 06-97-02/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | H0       | 06-97-05/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | L0       | 06-9a-03/80 | 00000436 | 00000437 | Core Gen12\n  | ADL            | R0       | 06-9a-04/80 | 00000436 | 00000437 | Core Gen12 \n  | ADL-N          | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E\n  | AML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | AZB            | A0/R0    | 06-9a-04/40 | 00000009 | 0000000a | Intel(R) Atom(R) C1100\n  | CFL-H          | R0       | 06-9e-0d/22 | 00000102 | 00000104 | Core Gen9 Mobile\n  | CLX-SP         | B1       | 06-55-07/bf | 05003707 | 05003901 | Xeon Scalable Gen2\n  | CML-H          | R1       | 06-a5-02/20 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-S102       | Q0       | 06-a5-05/22 | 000000fc | 00000100 | Core Gen10\n  | CML-S62        | G1       | 06-a5-03/22 | 000000fc | 00000100 | Core Gen10\n  | CML-U42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-U62 V1     | A0       | 06-a6-00/80 | 000000fe | 00000102 | Core Gen10 Mobile\n  | CML-U62 V2     | K1       | 06-a6-01/80 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CPX-SP         | A1       | 06-55-0b/bf | 07002904 | 07002b01 | Xeon Scalable Gen3\n  | EMR-SP         | A1       | 06-cf-02/87 | 21000291 | 210002a9 | Xeon Scalable Gen5\n  | GLK-R          | R0       | 06-7a-08/01 | 00000024 | 00000026 | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120\n  | ICL-D          | B0       | 06-6c-01/10 | 010002c0 | 010002d0 | Xeon D-17xx, D-27xx\n  | ICL-U/Y        | D1       | 06-7e-05/80 | 000000c6 | 000000ca | Core Gen10 Mobile\n  | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d0003f5 | 0d000404 | Xeon Scalable Gen3\n  | MTL            | C0       | 06-aa-04/e6 | 00000020 | 00000024 | Core Ultra Processor\n  | RKL-S          | B0       | 06-a7-01/02 | 00000063 | 00000064 | Core Gen11\n  | RPL-E/HX/S     | B0       | 06-b7-01/32 | 0000012c | 0000012f | Core Gen13/Gen14\n  | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004124 | 00004128 | Core Gen13\n  | RPL-HX/S       | C0       | 06-bf-02/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-S          | H0       | 06-bf-05/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004124 | 00004128 | Core Gen13\n  | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003e0 | 2c0003f7 | Xeon Max\n  | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SRF-SP         | C0       | 06-af-03/01 | 03000330 | 03000341 | Xeon 6700-Series Processors with E-Cores\n  | TGL            | B0/B1    | 06-8c-01/80 | 000000b8 | 000000bc | Core Gen11 Mobile\n  | TGL-H          | R0       | 06-8d-01/c2 | 00000052 | 00000056 | Core Gen11 Mobile\n  | TGL-R          | C0       | 06-8c-02/c2 | 00000038 | 0000003c | Core Gen11 Mobile\n  | TWL            | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E\n  | WHL-U          | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen8 Mobile\n","status":"published","published":"2025-05-16T13:38:05Z","modified":"2026-02-04T03:53:58.597839Z","updated_at":"2026-11-02T15:53:59.381172Z"},{"id":"SUSE-SU-2025:20410-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\nIntel CPU Microcode was updated to the 20250512 release (bsc#1243123)\n\n  - Security updates for INTEL-SA-01153\n    https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01153.html)\n\n    - CVE-2024-28956: Exposure of Sensitive Information in Shared\n      Microarchitectural Structures during Transient Execution for some\n      Intel Processors may allow an authenticated user to potentially\n      enable information disclosure via local access.\n\n  - Security updates for INTEL-SA-01244\n    https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01244.html)\n\n    - CVE-2025-20103: Insufficient resource pool in the core management\n      mechanism for some Intel Processors may allow an authenticated user\n      to potentially enable denial of service via local access.\n    - CVE-2025-20054: Uncaught exception in the core management\n      mechanism for some Intel Processors may allow an authenticated user\n      to potentially enable denial of service via local access.\n\n  - Security updates for INTEL-SA-01247\n    https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01247.html)\n\n     - CVE-2024-43420: Exposure of sensitive information caused by\n       shared microarchitectural predictor state that influences transient\n       execution for some Intel Atom processors may allow an authenticated\n       user to potentially enable information disclosure via local access.\n     - CVE-2025-20623: Exposure of sensitive information caused by\n       shared microarchitectural predictor state that influences transient\n       execution for some Intel Core processors (10th Generation) may allow\n       an authenticated user to potentially enable information disclosure\n       via local access.\n   - CVE-2024-45332: Exposure of sensitive information caused by shared\n     microarchitectural predictor state that influences transient execution\n     in the indirect branch predictors for some Intel Processors may allow\n     an authenticated user to potentially enable information disclosure\n     via local access.\n  - Security updates for INTEL-SA-01322\n    https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01322.html)\n\n    - CVE-2025-24495:  Incorrect initialization of resource in the branch\n      prediction unit for some Intel Core Ultra Processors may allow an\n      authenticated user to potentially enable information disclosure via\n      local access.\n    - CVE-2025-20012: Incorrect behavior order for some Intel Core Ultra\n      Processors may allow an unauthenticated user to potentially enable\n      information disclosure via physical access.\n\n  - Update for functional issues. Refer to Intel Core Ultra 200 V Series\n    Processor (Series2) https://cdrdv2.intel.com/v1/dl/getContent/834774)\n    for details.\n  - Update for functional issues. Refer to Intel Core Ultra 200 V Series\n    Processor https://cdrdv2.intel.com/v1/dl/getContent/827538) for details.\n  - Update for functional issues. Refer to Intel Core Ultra Processor\n    https://cdrdv2.intel.com/v1/dl/getContent/792254) for details.\n  - Update for functional issues. Refer to 14th/13th\n    Generation Intel Core Processor Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.\n  - Update for functional issues. Refer to 12th Generation Intel Core\n    Processor Family https://cdrdv2.intel.com/v1/dl/getContent/682436)\n    for details.\n  - Update for functional issues. Refer to 11th Gen Intel Core Processor\n    Specification Update https://cdrdv2.intel.com/v1/dl/getContent/631123)\n    for details.\n  - Update for functional issues. Refer to 10th Gen\n    Intel Core Processor Families Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/341079) for details.\n  - Update for functional issues. Refer to 10th Gen\n    Intel Core Processor Families Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/615213) for details.\n  - Update for functional issues. Refer to 8th and 9th\n    Generation Intel Core Processor Family Spec Update\n    https://cdrdv2.intel.com/v1/dl/getContent/337346) for details.\n  - Update for functional issues. Refer to 6th Gen\n    Intel Xeon Scalable Processors Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/835486) for details.\n  - Update for functional issues. Refer to 5th Gen Intel Xeon Processor\n    Scalable Family https://cdrdv2.intel.com/v1/dl/getContent/793902)\n    for details.\n  - Update for functional issues. Refer to 4th Gen\n    Intel Xeon Scalable Processors Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/772415) for details.\n  - Update for functional issues. Refer to 3rd Generation\n    Intel Xeon Scalable Processors Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/634897) for details.\n  - Update for functional issues. Refer to 3rd Generation\n    Intel Xeon Scalable Processors Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/637780) for details.\n  - Update for functional issues. Refer to 2nd Generation\n    Intel Xeon Processor Scalable Family Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/338848) for details.\n  - Update for functional issues. Refer to Intel\n    Xeon 6700-Series Processor Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/820922) for details.\n  - Update for functional issues. Refer to Intel Xeon E-2300 Processor\n    Specification Update https://cdrdv2.intel.com/v1/dl/getContent/709192)\n    for details.\n  - Update for functional issues. Refer to Intel Xeon D-2700 Processor\n    Specification Update https://cdrdv2.intel.com/v1/dl/getContent/714071)\n    for details.\n  - Update for functional issues. Refer to Intel Processors and Intel\n    Core i3 N-Series https://cdrdv2.intel.com/v1/dl/getContent/764616)\n    for details.\n  - Update for functional issues. Refer to Intel Pentium\n    Silver and Intel Celeron Processor Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/336562) for details.\n\n  ### New Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ARL-U          | A1       | 06-b5-00/80 |          | 0000000a | Core Ultra Processor (Series2)\n  | ARL-S/HX (8P)  | B0       | 06-c6-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | ARL-H          | A1       | 06-c5-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | GNR-AP/SP      | B0       | 06-ad-01/95 |          | 010003a2 | Xeon Scalable Gen6\n  | GNR-AP/SP      | H0       | 06-ad-01/20 |          | 0a0000d1 | Xeon Scalable Gen6\n  | LNL            | B0       | 06-bd-01/80 |          | 0000011f | Core Ultra 200 V Series Processor\n\n  ### Updated Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ADL            | C0       | 06-97-02/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | H0       | 06-97-05/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | L0       | 06-9a-03/80 | 00000436 | 00000437 | Core Gen12\n  | ADL            | R0       | 06-9a-04/80 | 00000436 | 00000437 | Core Gen12\n  | ADL-N          | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300,\n                                                                    N50/N97/N100/N200,\n                                                                    Atom x7211E/x7213E/x7425E\n  | AML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | AZB            | A0/R0    | 06-9a-04/40 | 00000009 | 0000000a | Intel(R) Atom(R) C1100\n  | CFL-H          | R0       | 06-9e-0d/22 | 00000102 | 00000104 | Core Gen9 Mobile\n  | CLX-SP         | B1       | 06-55-07/bf | 05003707 | 05003901 | Xeon Scalable Gen2\n  | CML-H          | R1       | 06-a5-02/20 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-S102       | Q0       | 06-a5-05/22 | 000000fc | 00000100 | Core Gen10\n  | CML-S62        | G1       | 06-a5-03/22 | 000000fc | 00000100 | Core Gen10\n  | CML-U42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-U62 V1     | A0       | 06-a6-00/80 | 000000fe | 00000102 | Core Gen10 Mobile\n  | CML-U62 V2     | K1       | 06-a6-01/80 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CPX-SP         | A1       | 06-55-0b/bf | 07002904 | 07002b01 | Xeon Scalable Gen3\n  | EMR-SP         | A1       | 06-cf-02/87 | 21000291 | 210002a9 | Xeon Scalable Gen5\n  | GLK-R          | R0       | 06-7a-08/01 | 00000024 | 00000026 | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120\n  | ICL-D          | B0       | 06-6c-01/10 | 010002c0 | 010002d0 | Xeon D-17xx, D-27xx\n  | ICL-U/Y        | D1       | 06-7e-05/80 | 000000c6 | 000000ca | Core Gen10 Mobile\n  | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d0003f5 | 0d000404 | Xeon Scalable Gen3\n  | MTL            | C0       | 06-aa-04/e6 | 00000020 | 00000024 | Core Ultra Processor\n  | RKL-S          | B0       | 06-a7-01/02 | 00000063 | 00000064 | Core Gen11\n  | RPL-E/HX/S     | B0       | 06-b7-01/32 | 0000012c | 0000012f | Core Gen13/Gen14\n  | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004124 | 00004128 | Core Gen13\n  | RPL-HX/S       | C0       | 06-bf-02/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-S          | H0       | 06-bf-05/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004124 | 00004128 | Core Gen13\n  | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003e0 | 2c0003f7 | Xeon Max\n  | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SRF-SP         | C0       | 06-af-03/01 | 03000330 | 03000341 | Xeon 6700-Series Processors with E-Cores\n  | TGL            | B0/B1    | 06-8c-01/80 | 000000b8 | 000000bc | Core Gen11 Mobile\n  | TGL-H          | R0       | 06-8d-01/c2 | 00000052 | 00000056 | Core Gen11 Mobile\n  | TGL-R          | C0       | 06-8c-02/c2 | 00000038 | 0000003c | Core Gen11 Mobile\n  | TWL            | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200,\n                                                                    Atom x7211E/x7213E/x7425E\n  | WHL-U          | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen8 Mobile\n\n","status":"published","published":"2025-06-16T09:53:26Z","modified":"2026-03-23T04:47:13.775682Z","updated_at":"2026-11-02T15:53:59.92114Z"},{"id":"SUSE-SU-2025:20424-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\nIntel CPU Microcode was updated to the 20250512 release (bsc#1243123):\n\n  - Security updates for INTEL-SA-01153\n    https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01153.html\n    - CVE-2024-28956: Exposure of Sensitive Information in Shared\n      Microarchitectural Structures during Transient Execution for some\n      Intel Processors may allow an authenticated user to potentially\n      enable information disclosure via local access.\n\n  - Security updates for INTEL-SA-01244\n    https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01244.html\n    - CVE-2025-20103: Insufficient resource pool in the core management\n      mechanism for some Intel Processors may allow an authenticated user\n      to potentially enable denial of service via local access.\n    - CVE-2025-20054: Uncaught exception in the core management\n      mechanism for some Intel Processors may allow an authenticated user\n      to potentially enable denial of service via local access.\n\n  - Security updates for INTEL-SA-01247\n    https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01247.html\n     - CVE-2024-43420: Exposure of sensitive information caused by\n       shared microarchitectural predictor state that influences transient\n       execution for some Intel Atom processors may allow an authenticated\n       user to potentially enable information disclosure via local access.\n     - CVE-2025-20623: Exposure of sensitive information caused by\n       shared microarchitectural predictor state that influences transient\n       execution for some Intel Core processors (10th Generation) may allow\n       an authenticated user to potentially enable information disclosure\n       via local access.\n   - CVE-2024-45332: Exposure of sensitive information caused by shared\n     microarchitectural predictor state that influences transient execution\n     in the indirect branch predictors for some Intel Processors may allow\n     an authenticated user to potentially enable information disclosure\n     via local access.\n\n  - Security updates for INTEL-SA-01322\n    https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01322.html\n    - CVE-2025-24495:  Incorrect initialization of resource in the branch\n      prediction unit for some Intel Core Ultra Processors may allow an\n      authenticated user to potentially enable information disclosure via\n      local access.\n    - CVE-2025-20012: Incorrect behavior order for some Intel Core Ultra\n      Processors may allow an unauthenticated user to potentially enable\n      information disclosure via physical access.\n\n  - Update for functional issues. Refer to Intel Core Ultra 200 V Series\n    Processor (Series2) https://cdrdv2.intel.com/v1/dl/getContent/834774\n    for details.\n  - Update for functional issues. Refer to Intel Core Ultra 200 V Series\n    Processor https://cdrdv2.intel.com/v1/dl/getContent/827538 for details.\n  - Update for functional issues. Refer to Intel Core Ultra Processor\n    https://cdrdv2.intel.com/v1/dl/getContent/792254 for details.\n  - Update for functional issues. Refer to 14th/13th\n    Generation Intel Core Processor Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/740518 for details.\n  - Update for functional issues. Refer to 12th Generation Intel Core\n    Processor Family https://cdrdv2.intel.com/v1/dl/getContent/682436\n    for details.\n  - Update for functional issues. Refer to 11th Gen Intel Core Processor\n    Specification Update https://cdrdv2.intel.com/v1/dl/getContent/631123\n    for details.\n  - Update for functional issues. Refer to 10th Gen\n    Intel Core Processor Families Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/341079 for details.\n  - Update for functional issues. Refer to 10th Gen\n    Intel Core Processor Families Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/615213 for details.\n  - Update for functional issues. Refer to 8th and 9th\n    Generation Intel Core Processor Family Spec Update\n    https://cdrdv2.intel.com/v1/dl/getContent/337346 for details.\n  - Update for functional issues. Refer to 6th Gen\n    Intel Xeon Scalable Processors Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/835486 for details.\n  - Update for functional issues. Refer to 5th Gen Intel Xeon Processor\n    Scalable Family https://cdrdv2.intel.com/v1/dl/getContent/793902\n    for details.\n  - Update for functional issues. Refer to 4th Gen\n    Intel Xeon Scalable Processors Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/772415 for details.\n  - Update for functional issues. Refer to 3rd Generation\n    Intel Xeon Scalable Processors Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/634897 for details.\n  - Update for functional issues. Refer to 3rd Generation\n    Intel Xeon Scalable Processors Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/637780 for details.\n  - Update for functional issues. Refer to 2nd Generation\n    Intel Xeon Processor Scalable Family Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/338848 for details.\n  - Update for functional issues. Refer to Intel\n    Xeon 6700-Series Processor Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/820922 for details.\n  - Update for functional issues. Refer to Intel Xeon E-2300 Processor\n    Specification Update https://cdrdv2.intel.com/v1/dl/getContent/709192\n    for details.\n  - Update for functional issues. Refer to Intel Xeon D-2700 Processor\n    Specification Update https://cdrdv2.intel.com/v1/dl/getContent/714071\n    for details.\n  - Update for functional issues. Refer to Intel Processors and Intel\n    Core i3 N-Series https://cdrdv2.intel.com/v1/dl/getContent/764616\n    for details.\n  - Update for functional issues. Refer to Intel Pentium\n    Silver and Intel Celeron Processor Specification Update\n    https://cdrdv2.intel.com/v1/dl/getContent/336562 for details.\n\n  ### New Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ARL-U          | A1       | 06-b5-00/80 |          | 0000000a | Core Ultra Processor (Series2)\n  | ARL-S/HX (8P)  | B0       | 06-c6-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | ARL-H          | A1       | 06-c5-02/82 |          | 00000118 | Core Ultra Processor (Series2)\n  | GNR-AP/SP      | B0       | 06-ad-01/95 |          | 010003a2 | Xeon Scalable Gen6\n  | GNR-AP/SP      | H0       | 06-ad-01/20 |          | 0a0000d1 | Xeon Scalable Gen6\n  | LNL            | B0       | 06-bd-01/80 |          | 0000011f | Core Ultra 200 V Series Processor\n\n  ### Updated Platforms\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ADL            | C0       | 06-97-02/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | H0       | 06-97-05/07 | 00000038 | 0000003a | Core Gen12\n  | ADL            | L0       | 06-9a-03/80 | 00000436 | 00000437 | Core Gen12\n  | ADL            | R0       | 06-9a-04/80 | 00000436 | 00000437 | Core Gen12 \n  | ADL-N          | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300,\n                                                                    N50/N97/N100/N200,\n                                                                    Atom x7211E/x7213E/x7425E\n  | AML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | AZB            | A0/R0    | 06-9a-04/40 | 00000009 | 0000000a | Intel(R) Atom(R) C1100\n  | CFL-H          | R0       | 06-9e-0d/22 | 00000102 | 00000104 | Core Gen9 Mobile\n  | CLX-SP         | B1       | 06-55-07/bf | 05003707 | 05003901 | Xeon Scalable Gen2\n  | CML-H          | R1       | 06-a5-02/20 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-S102       | Q0       | 06-a5-05/22 | 000000fc | 00000100 | Core Gen10\n  | CML-S62        | G1       | 06-a5-03/22 | 000000fc | 00000100 | Core Gen10\n  | CML-U42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-U62 V1     | A0       | 06-a6-00/80 | 000000fe | 00000102 | Core Gen10 Mobile\n  | CML-U62 V2     | K1       | 06-a6-01/80 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile\n  | CPX-SP         | A1       | 06-55-0b/bf | 07002904 | 07002b01 | Xeon Scalable Gen3\n  | EMR-SP         | A1       | 06-cf-02/87 | 21000291 | 210002a9 | Xeon Scalable Gen5\n  | GLK-R          | R0       | 06-7a-08/01 | 00000024 | 00000026 | Pentium J5040/N5030,\n                                                                    Celeron J4125/J4025/N4020/N4120\n  | ICL-D          | B0       | 06-6c-01/10 | 010002c0 | 010002d0 | Xeon D-17xx, D-27xx\n  | ICL-U/Y        | D1       | 06-7e-05/80 | 000000c6 | 000000ca | Core Gen10 Mobile\n  | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d0003f5 | 0d000404 | Xeon Scalable Gen3\n  | MTL            | C0       | 06-aa-04/e6 | 00000020 | 00000024 | Core Ultra Processor\n  | RKL-S          | B0       | 06-a7-01/02 | 00000063 | 00000064 | Core Gen11\n  | RPL-E/HX/S     | B0       | 06-b7-01/32 | 0000012c | 0000012f | Core Gen13/Gen14\n  | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004124 | 00004128 | Core Gen13\n  | RPL-HX/S       | C0       | 06-bf-02/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-S          | H0       | 06-bf-05/07 | 00000038 | 0000003a | Core Gen13/Gen14\n  | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004124 | 00004128 | Core Gen13\n  | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003e0 | 2c0003f7 | Xeon Max\n  | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000620 | 2b000639 | Xeon Scalable Gen4\n  | SRF-SP         | C0       | 06-af-03/01 | 03000330 | 03000341 | Xeon 6700-Series Processors with E-Cores\n  | TGL            | B0/B1    | 06-8c-01/80 | 000000b8 | 000000bc | Core Gen11 Mobile\n  | TGL-H          | R0       | 06-8d-01/c2 | 00000052 | 00000056 | Core Gen11 Mobile\n  | TGL-R          | C0       | 06-8c-02/c2 | 00000038 | 0000003c | Core Gen11 Mobile\n  | TWL            | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300,\n                                                                    N50/N97/N100/N200,\n                                                                    Atom x7211E/x7213E/x7425E\n  | WHL-U          | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen8 Mobile\n\n","status":"published","published":"2025-06-16T09:28:11Z","modified":"2026-03-23T04:48:16.559161Z","updated_at":"2026-11-02T15:53:59.92114Z"},{"id":"USN-7535-1","title":"intel-microcode vulnerabilities","description":"Sander Wiebing and Cristiano Giuffrida discovered that some Intel®\nProcessors did not properly handle data in Shared Microarchitectural\nStructures during Transient Execution. An authenticated attacker could\npossibly use this issue to obtain sensitive information. (CVE-2024-28956)\n\nIt was discovered that some Intel® Processors did not properly handle\nprediction calculations. An authenticated attacker could possibly use this\nissue to obtain sensitive information. (CVE-2024-43420, CVE-2024-45332,\nCVE-2025-20623)\n\nIt was discovered that some Intel® Processors did not properly initialize\nresources in the branch prediction unit. An authenticated attacker could\npossibly use this issue to obtain sensitive information. (CVE-2025-20012,\nCVE-2025-24495)\n\nMichal Raviv and Jeff Gilbert discovered that some Intel® Processors did\nnot properly handle resources and exceptions in the core management\nmechanism. An authenticated attacker could possibly use this issue to\ncause a denial of service. (CVE-2025-20054, CVE-2025-20103)\n","status":"published","published":"2025-05-27T12:21:14Z","modified":"2026-11-03T14:31:05.574776391Z","updated_at":"2026-11-03T14:35:23.570529Z"}]}}