{"id":"CVE-2025-20109","aliases":["ALPINE-CVE-2025-20109","BELL-CVE-2025-20109","DEBIAN-CVE-2025-20109","DLA-4347-1","DSA-6030-1","EUVD-2025-24431","GHSA-3cpg-9r3v-qv5v","MGASA-2025-0236","OESA-2025-2071","SUSE-SU-2025:03052-1","SUSE-SU-2025:03053-1","SUSE-SU-2025:03116-1","SUSE-SU-2025:20691-1","SUSE-SU-2025:20715-1","UBUNTU-CVE-2025-20109","USN-7866-1","openSUSE-SU-2025:15491-1"],"status":"published","title":"Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R)...","description":"Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via local access.","severity":{"version":"4.0","score":7.3,"vector":"CVSS:4.0/AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N","level":"high","assessor":"cna","from":"cve"},"epss":{"day":"2026-11-08","score":0.0015,"percentile":0.04202,"model":"v2026.06.15"},"facts":{"in_kev":false,"known_exploited":false,"public_exploit":false,"fix_available":true},"cwes":["CWE-653"],"published":"2025-08-12T16:58:18Z","modified":"2026-09-01T20:05:41Z","fixes":[{"ecosystem":"Alpine:v3.19","package":"intel-ucode","fixed_in":["20250812-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.20","package":"intel-ucode","fixed_in":["20250812-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.21","package":"intel-ucode","fixed_in":["20250812-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.22","package":"intel-ucode","fixed_in":["20250812-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.23","package":"intel-ucode","fixed_in":["20250812-r0"],"sources":["osv"]},{"ecosystem":"Alpine:v3.24","package":"intel-ucode","fixed_in":["20250812-r0"],"sources":["osv"]},{"ecosystem":"Alpaquita:23","package":"intel-ucode","fixed_in":["20250812-r0"],"sources":["osv"]},{"ecosystem":"Alpaquita:25","package":"intel-ucode","fixed_in":["20250812-r0"],"sources":["osv"]},{"ecosystem":"Alpaquita:stream","package":"intel-ucode","fixed_in":["20250812-r0"],"sources":["osv"]},{"ecosystem":"Debian:12","package":"intel-microcode","fixed_in":["3.20250812.1~deb12u1"],"sources":["osv"]},{"ecosystem":"Debian:13","package":"intel-microcode","fixed_in":["3.20250812.1~deb13u1"],"sources":["osv"]},{"ecosystem":"Debian:14","package":"intel-microcode","fixed_in":["3.20250812.1"],"sources":["osv"]},{"ecosystem":"Ubuntu:Pro:16.04:LTS","package":"intel-microcode","fixed_in":["3.20250812.0ubuntu0.16.04.1+esm1"],"sources":["osv"]},{"ecosystem":"Ubuntu:Pro:18.04:LTS","package":"intel-microcode","fixed_in":["3.20250812.0ubuntu0.18.04.1+esm1"],"sources":["osv"]},{"ecosystem":"Ubuntu:Pro:20.04:LTS","package":"intel-microcode","fixed_in":["3.20250812.0ubuntu0.20.04.1+esm1"],"sources":["osv"]},{"ecosystem":"Ubuntu:22.04:LTS","package":"intel-microcode","fixed_in":["3.20250812.0ubuntu0.22.04.1"],"sources":["osv"]},{"ecosystem":"Ubuntu:24.04:LTS","package":"intel-microcode","fixed_in":["3.20250812.0ubuntu0.24.04.1"],"sources":["osv"]},{"ecosystem":"Ubuntu:25.10","package":"intel-microcode","fixed_in":["3.20250812.0ubuntu0.25.10.1"],"sources":["osv"]}],"affected":[{"source":"osv","ecosystem":"Alpine:v3.19","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250812-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.20","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250812-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.21","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250812-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.22","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250812-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.23","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250812-r0"}]}]},{"source":"osv","ecosystem":"Alpine:v3.24","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250812-r0"}]}]},{"source":"osv","ecosystem":"Alpaquita:23","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"20230516a-r0"},{"fixed":"20250812-r0"}]}]},{"source":"osv","ecosystem":"Alpaquita:25","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"20250512-r0"},{"fixed":"20250812-r0"}]}]},{"source":"osv","ecosystem":"Alpaquita:stream","package":"intel-ucode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"20230214-r0"},{"fixed":"20250812-r0"}]}]},{"source":"osv","ecosystem":"Debian:12","package":"intel-microcode","ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"3.20250812.1~deb12u1"}]}],"versions":["0.20080131-1","0.20080220-1","0.20080401-1","0.20080910-1","0.20080910-2","0.20090330-1","0.20090927-1","0.20100826-1","0.20100914-1","0.20101123-1","0.20110428-1","0.20110915-1","0.20111110-1","0.20120606-1","1.20120606.1","1.20120606.2","1.20120606.3","1.20120606.4","1.20120606.5","1.20120606.6","1.20120606.6~bpo60+1","1.20120606.v2.1","1.20120606.v2.2","1.20120606.v2.2~bpo60+1","1.20130222.1","1.20130222.1~bpo60+1","1.20130222.3","1.20130222.4","1.20130222.5","1.20130222.6","1.20130808.1","1.20130808.2","1.20130906.1","1.20140122.1","1.20140122.1~bpo60+1","1.20140430.1","1.20140430.1~bpo60+1","1.20140624.1","1.20140624.1~bpo60+1","1.20140913.1","1.20140913.1~bpo60+1","1.20150121.1","2.20130808.1","2.20130808.1~bpo70+1","2.20130906.1","2.20130906.1~bpo70+1","2.20140122.1","2.20140122.1~bpo70+1","2.20140430.1","2.20140430.1~bpo70+1","2.20140624.1","2.20140624.1~bpo70+1","3.20140913.1","3.20140913.1~bpo70+1","3.20140913.1~bpo70+2","3.20150107.1","3.20150107.1~bpo70+1","3.2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access.","status":"published","published":"2025-08-12T16:58:18Z","modified":"2026-02-26T17:49:37Z","cvss":[{"version":"4.0","score":7.3,"vector":"CVSS:4.0/AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N","level":"high"}],"updated_at":"2026-11-02T19:48:20.263706Z"}],"ghsa":[{"id":"GHSA-3cpg-9r3v-qv5v","title":"Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R)...","description":"Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via local access.","status":"published","published":"2025-08-12T18:31:27Z","modified":"2025-11-03T18:31:34Z","cvss":[{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high"},{"version":"4.0","score":7.3,"vector":"CVSS:4.0/AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X","level":"high"}],"cwes":["CWE-653"],"updated_at":"2026-11-02T15:04:17.06099Z"}],"nvd":[{"id":"CVE-2025-20109","description":"Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via local access.","status":"published","published":"2025-08-12T17:15:29.74Z","modified":"2026-06-17T08:40:41.257Z","cvss":[{"version":"4.0","score":7.3,"vector":"CVSS:4.0/AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X","level":"high","assessor":"secondary"},{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high","assessor":"secondary"}],"cwes":["CWE-653"],"updated_at":"2026-11-02T14:11:22.953396Z"}],"osv":[{"id":"ALPINE-CVE-2025-20109","description":"Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via local access.","status":"published","published":"2025-08-12T17:15:29.74Z","modified":"2026-08-27T22:18:02.783442235Z","cvss":[{"version":"4.0","score":7.3,"vector":"CVSS:4.0/AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X","level":"high"}],"updated_at":"2026-11-02T15:27:49.709457Z"},{"id":"BELL-CVE-2025-20109","status":"published","published":"2025-08-14T06:06:22.458884Z","modified":"2026-01-26T09:38:41.757299Z","cvss":[{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high"}],"updated_at":"2026-11-02T15:28:21.227396Z"},{"id":"DEBIAN-CVE-2025-20109","description":"Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via local access.","status":"published","published":"2025-08-12T17:15:29.74Z","modified":"2026-09-01T20:05:41.759723159Z","cvss":[{"version":"4.0","score":7.3,"vector":"CVSS:4.0/AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X","level":"high"}],"updated_at":"2026-11-02T15:45:45.102284Z"},{"id":"OESA-2025-2071","title":"microcode_ctl security update","description":"Security Fix(es):\n\nImproper buffer restrictions for some Intel(R) Xeon(R) Processor firmware with SGX enabled may allow a privileged user to potentially enable escalation of privilege via local access.(CVE-2025-20053)\n\nImproper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via local access.(CVE-2025-20109)\n\nMissing reference to active allocated resource for some Intel(R) Xeon(R) processors may allow an authenticated user to potentially enable denial of service via local access.(CVE-2025-21090)\n\nInsufficient granularity of access control in the OOB-MSM for some Intel(R) Xeon(R) 6 Scalable processors may allow a privileged user to potentially enable escalation of privilege via adjacent access.(CVE-2025-22839)\n\nSequence of processor instructions leads to unexpected behavior for some Intel(R) Xeon(R) 6 Scalable processors may allow an authenticated user to potentially enable escalation of privilege via local access(CVE-2025-22840)\n\nImproper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.(CVE-2025-22889)\n\nInsufficient control flow management in the Alias Checking Trusted Module (ACTM) firmware for some Intel(R) Xeon(R) processors may allow a privileged user to potentially enable escalation of privilege via local access.(CVE-2025-24305)\n\nOut-of-bounds write in the memory subsystem for some Intel(R) Xeon(R) 6 processors when using Intel(R) SGX or Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.(CVE-2025-26403)\n\nImproperly implemented security check for standard in the DDRIO configuration for some Intel(R) Xeon(R) 6 Processors when using Intel(R) SGX or Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.(CVE-2025-32086)","status":"published","published":"2025-08-22T11:09:09Z","modified":"2026-08-18T01:18:08.134137821Z","cvss":[{"version":"3.1","score":7.9,"vector":"CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:N","level":"high"}],"updated_at":"2026-11-02T15:52:43.127925Z"},{"id":"UBUNTU-CVE-2025-20109","description":"Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via local access.","status":"published","published":"2025-08-12T17:15:00Z","modified":"2026-02-04T04:18:18.973376Z","cvss":[{"version":"3.1","score":7.8,"vector":"CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:H/A:H","level":"high"},{"version":"4.0","score":7.3,"vector":"CVSS:4.0/AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N","level":"high"}],"updated_at":"2026-11-02T16:55:20.144818Z"},{"id":"CVE-2025-20109","description":"Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via local access.","status":"published","published":"2025-08-12T17:15:29Z","modified":"2026-04-16T04:36:59.313973601Z","updated_at":"2026-11-02T15:44:46.665428Z"},{"id":"DLA-4347-1","title":"intel-microcode - security update","status":"published","published":"2025-10-25T00:00:00Z","modified":"2025-10-25T21:32:13.667266Z","updated_at":"2026-11-02T15:46:12.7027Z"},{"id":"DSA-6030-1","title":"intel-microcode - security update","status":"published","published":"2025-10-22T00:00:00Z","modified":"2025-10-22T19:17:56.206598Z","updated_at":"2026-11-02T15:46:18.296714Z"},{"id":"MGASA-2025-0236","title":"Updated microcode packages fix security vulnerabilities","description":"The updated package updates AMD cpu microcode for processor family 19h,\nadds AMD cpu microcode for processor family 1ah and fixes security\nvulnerabilities for Intel processors:\nImproper Isolation or Compartmentalization in the stream cache mechanism\nfor some Intel® Processors may allow an authenticated user to\npotentially enable escalation of privilege via local access.\n(CVE-2025-20109)\nSequence of processor instructions leads to unexpected behavior for some\nIntel® Xeon® 6 Scalable processors may allow an authenticated user to\npotentially enable escalation of privilege via local access.\n(CVE-2025-22840)\nInsufficient granularity of access control in the OOB-MSM for some\nIntel® Xeon® 6 Scalable processors may allow a privileged user to\npotentially enable escalation of privilege via adjacent access.\n(CVE-2025-22839)\nImproper handling of overlap between protected memory ranges for some\nIntel® Xeon® 6 processor with Intel® TDX may allow a privileged user to\npotentially enable escalation of privilege via local access.\n(CVE-2025-22889)\nImproper buffer restrictions for some Intel® Xeon® Processor firmware\nwith SGX enabled may allow a privileged user to potentially enable\nescalation of privilege via local access. (CVE-2025-20053)\nInsufficient control flow management in the Alias Checking Trusted\nModule (ACTM) firmware for some Intel® Xeon® processors may allow a\nprivileged user to potentially enable escalation of privilege via local\naccess. (CVE-2025-24305)\nMissing reference to active allocated resource for some Intel® Xeon®\nprocessors may allow an authenticated user to potentially enable denial\nof service via local access. (CVE-2025-21090)\nOut-of-bounds write in the memory subsystem for some Intel® Xeon® 6\nprocessors when using Intel® SGX or Intel® TDX may allow a privileged\nuser to potentially enable escalation of privilege via local access.\n(CVE-2025-26403)\nImproperly implemented security check for standard in the DDRIO\nconfiguration for some Intel® Xeon® 6 Processors when using Intel® SGX\nor Intel® TDX may allow a privileged user to potentially enable\nescalation of privilege via local access. (CVE-2025-32086)\n","status":"published","published":"2025-10-10T03:12:21Z","modified":"2026-04-16T04:43:12.498564606Z","updated_at":"2026-11-02T15:49:43.178336Z"},{"id":"openSUSE-SU-2025:15491-1","title":"ucode-intel-20250812-1.1 on GA media","description":"These are all security issues fixed in the ucode-intel-20250812-1.1 package on the GA media of openSUSE Tumbleweed.","status":"published","published":"2025-08-25T00:00:00Z","modified":"2026-03-23T04:53:50.669368Z","updated_at":"2026-11-02T16:58:37.810934Z"},{"id":"SUSE-SU-2025:03052-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Intel CPU Microcode was updated to the 20250812 release (bsc#1248438)\n     - CVE-2025-20109: Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel Processors may allow an authenticated user to potentially enable escalation of privilege via local access.\n     - CVE-2025-22840: Sequence of processor instructions leads to unexpected behavior for some Intel Xeon 6 Scalable processors may allow an authenticated user to potentially enable escalation of privilege via local access\n     - CVE-2025-22839: Insufficient granularity of access control in the OOB-MSM for some Intel Xeon 6 Scalable processors may allow a privileged user to potentially enable escalation of privilege via adjacent access.\n     - CVE-2025-22889: Improper handling of overlap between protected memory ranges for some Intel Xeon 6 processor with Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-20053: Improper buffer restrictions for some Intel Xeon Processor firmware with SGX enabled may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-26403: Out-of-bounds write in the memory subsystem for some Intel Xeon 6 processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-32086: Improperly implemented security check for standard in the DDRIO configuration for some Intel Xeon 6 Processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - Update for functional issues. \n     - Updated Platforms:\n    \n       | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n       |:---------------|:---------|:------------|:---------|:---------|:---------\n       | ARL-H          | A1       | 06-c5-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n       | ARL-S/HX (8P)  | B0       | 06-c6-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n       | EMR-SP         | A1       | 06-cf-02/87 | 210002a9 | 210002b3 | Xeon Scalable Gen5\n       | GNR-AP/SP      | B0       | 06-ad-01/95 | 010003a2 | 010003d0 | Xeon Scalable Gen6\n       | GNR-AP/SP      | H0       | 06-ad-01/20 | 0a0000d1 | 0a000100 | Xeon Scalable Gen6\n       | ICL-D          | B0       | 06-6c-01/10 | 010002d0 | 010002e0 | Xeon D-17xx, D-27xx\n       | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d000404 | 0d000410 | Xeon Scalable Gen3\n       | LNL            | B0       | 06-bd-01/80 | 0000011f | 00000123 | Core Ultra 200 V Series Processor\n       | MTL            | C0       | 06-aa-04/e6 | 00000024 | 00000025 | Core™ Ultra Processor\n       | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004128 | 00004129 | Core Gen13\n       | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004128 | 00004129 | Core Gen13\n       | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003f7 | 2c000401 | Xeon Max\n       | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n       | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n       | SRF-SP         | C0       | 06-af-03/01 | 03000341 | 03000362 | Xeon 6700-Series Processors with E-Cores\n    \n  New Disclosures Updated in Prior Releases:\n  All ADL, RPL, SPR, EMR, MTL, ARL Microcode patches previously released in May 2025.\n","status":"published","published":"2025-09-02T17:41:10Z","modified":"2025-09-03T16:16:15.293935Z","updated_at":"2026-11-02T15:53:57.111474Z"},{"id":"SUSE-SU-2025:03053-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Intel CPU Microcode was updated to the 20250812 release (bsc#1248438)\n     - CVE-2025-20109: Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel Processors may allow an authenticated user to potentially enable escalation of privilege via local access.\n     - CVE-2025-22840: Sequence of processor instructions leads to unexpected behavior for some Intel Xeon 6 Scalable processors may allow an authenticated user to potentially enable escalation of privilege via local access\n     - CVE-2025-22839: Insufficient granularity of access control in the OOB-MSM for some Intel Xeon 6 Scalable processors may allow a privileged user to potentially enable escalation of privilege via adjacent access.\n     - CVE-2025-22889: Improper handling of overlap between protected memory ranges for some Intel Xeon 6 processor with Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-20053: Improper buffer restrictions for some Intel Xeon Processor firmware with SGX enabled may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-26403: Out-of-bounds write in the memory subsystem for some Intel Xeon 6 processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-32086: Improperly implemented security check for standard in the DDRIO configuration for some Intel Xeon 6 Processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - Update for functional issues.\n     - Updated Platforms:\n\n       | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n       |:---------------|:---------|:------------|:---------|:---------|:---------\n       | ARL-H          | A1       | 06-c5-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n       | ARL-S/HX (8P)  | B0       | 06-c6-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n       | EMR-SP         | A1       | 06-cf-02/87 | 210002a9 | 210002b3 | Xeon Scalable Gen5\n       | GNR-AP/SP      | B0       | 06-ad-01/95 | 010003a2 | 010003d0 | Xeon Scalable Gen6\n       | GNR-AP/SP      | H0       | 06-ad-01/20 | 0a0000d1 | 0a000100 | Xeon Scalable Gen6\n       | ICL-D          | B0       | 06-6c-01/10 | 010002d0 | 010002e0 | Xeon D-17xx, D-27xx\n       | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d000404 | 0d000410 | Xeon Scalable Gen3\n       | LNL            | B0       | 06-bd-01/80 | 0000011f | 00000123 | Core Ultra 200 V Series Processor\n       | MTL            | C0       | 06-aa-04/e6 | 00000024 | 00000025 | Core™ Ultra Processor\n       | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004128 | 00004129 | Core Gen13\n       | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004128 | 00004129 | Core Gen13\n       | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003f7 | 2c000401 | Xeon Max\n       | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n       | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n       | SRF-SP         | C0       | 06-af-03/01 | 03000341 | 03000362 | Xeon 6700-Series Processors with E-Cores\n  \n  New Disclosures Updated in Prior Releases:\n  All ADL, RPL, SPR, EMR, MTL, ARL Microcode patches previously released in May 2025.\n","status":"published","published":"2025-09-02T17:42:12Z","modified":"2026-02-04T02:47:03.467413Z","updated_at":"2026-11-02T15:53:57.111474Z"},{"id":"SUSE-SU-2025:03116-1","title":"Security update for microcode_ctl","description":"This update for microcode_ctl fixes the following issues:\n\n- Intel CPU Microcode was updated to the 20250812 release (bsc#1248438)\n     - CVE-2025-20109: Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel Processors may allow an authenticated user to potentially enable escalation of privilege via local access.\n     - CVE-2025-22840: Sequence of processor instructions leads to unexpected behavior for some Intel Xeon 6 Scalable processors may allow an authenticated user to potentially enable escalation of privilege via local access\n     - CVE-2025-22839: Insufficient granularity of access control in the OOB-MSM for some Intel Xeon 6 Scalable processors may allow a privileged user to potentially enable escalation of privilege via adjacent access.\n     - CVE-2025-22889: Improper handling of overlap between protected memory ranges for some Intel Xeon 6 processor with Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-20053: Improper buffer restrictions for some Intel Xeon Processor firmware with SGX enabled may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-26403: Out-of-bounds write in the memory subsystem for some Intel Xeon 6 processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-32086: Improperly implemented security check for standard in the DDRIO configuration for some Intel Xeon 6 Processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - Update for functional issues. \n     - Updated Platforms:\n\n       | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n       |:---------------|:---------|:------------|:---------|:---------|:---------\n       | ARL-H          | A1       | 06-c5-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n       | ARL-S/HX (8P)  | B0       | 06-c6-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n       | EMR-SP         | A1       | 06-cf-02/87 | 210002a9 | 210002b3 | Xeon Scalable Gen5\n       | GNR-AP/SP      | B0       | 06-ad-01/95 | 010003a2 | 010003d0 | Xeon Scalable Gen6\n       | GNR-AP/SP      | H0       | 06-ad-01/20 | 0a0000d1 | 0a000100 | Xeon Scalable Gen6\n       | ICL-D          | B0       | 06-6c-01/10 | 010002d0 | 010002e0 | Xeon D-17xx, D-27xx\n       | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d000404 | 0d000410 | Xeon Scalable Gen3\n       | LNL            | B0       | 06-bd-01/80 | 0000011f | 00000123 | Core Ultra 200 V Series Processor\n       | MTL            | C0       | 06-aa-04/e6 | 00000024 | 00000025 | Core™ Ultra Processor\n       | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004128 | 00004129 | Core Gen13\n       | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004128 | 00004129 | Core Gen13\n       | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003f7 | 2c000401 | Xeon Max\n       | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n       | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n       | SRF-SP         | C0       | 06-af-03/01 | 03000341 | 03000362 | Xeon 6700-Series Processors with E-Cores\n  \n  New Disclosures Updated in Prior Releases:\n  All ADL, RPL, SPR, EMR, MTL, ARL Microcode patches previously released in May 2025.\n","status":"published","published":"2025-09-09T10:57:16Z","modified":"2026-02-04T03:37:37.554126Z","updated_at":"2026-11-02T15:53:57.111474Z"},{"id":"SUSE-SU-2025:20691-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Intel CPU Microcode was updated to the 20250812 release (bsc#1248438)\n     - CVE-2025-20109: Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel Processors may allow an authenticated user to potentially enable escalation of privilege via local access.\n     - CVE-2025-22840: Sequence of processor instructions leads to unexpected behavior for some Intel Xeon 6 Scalable processors may allow an authenticated user to potentially enable escalation of privilege via local access\n     - CVE-2025-22839: Insufficient granularity of access control in the OOB-MSM for some Intel Xeon 6 Scalable processors may allow a privileged user to potentially enable escalation of privilege via adjacent access.\n     - CVE-2025-22889: Improper handling of overlap between protected memory ranges for some Intel Xeon 6 processor with Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-20053: Improper buffer restrictions for some Intel Xeon Processor firmware with SGX enabled may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-26403: Out-of-bounds write in the memory subsystem for some Intel Xeon 6 processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-32086: Improperly implemented security check for standard in the DDRIO configuration for some Intel Xeon 6 Processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - Update for functional issues.\n     - Updated Platforms:\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ARL-H          | A1       | 06-c5-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n  | ARL-S/HX (8P)  | B0       | 06-c6-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n  | EMR-SP         | A1       | 06-cf-02/87 | 210002a9 | 210002b3 | Xeon Scalable Gen5\n  | GNR-AP/SP      | B0       | 06-ad-01/95 | 010003a2 | 010003d0 | Xeon Scalable Gen6\n  | GNR-AP/SP      | H0       | 06-ad-01/20 | 0a0000d1 | 0a000100 | Xeon Scalable Gen6\n  | ICL-D          | B0       | 06-6c-01/10 | 010002d0 | 010002e0 | Xeon D-17xx, D-27xx\n  | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d000404 | 0d000410 | Xeon Scalable Gen3\n  | LNL            | B0       | 06-bd-01/80 | 0000011f | 00000123 | Core Ultra 200 V Series Processor\n  | MTL            | C0       | 06-aa-04/e6 | 00000024 | 00000025 | Core™ Ultra Processor\n  | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004128 | 00004129 | Core Gen13\n  | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004128 | 00004129 | Core Gen13\n  | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003f7 | 2c000401 | Xeon Max\n  | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n  | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n  | SRF-SP         | C0       | 06-af-03/01 | 03000341 | 03000362 | Xeon 6700-Series Processors with E-Cores\n\n  New Disclosures Updated in Prior Releases:\n  All ADL, RPL, SPR, EMR, MTL, ARL Microcode patches previously released in May 2025.\n","status":"published","published":"2025-09-09T10:18:48Z","modified":"2026-03-23T04:50:14.627533Z","updated_at":"2026-11-02T15:53:59.92114Z"},{"id":"SUSE-SU-2025:20715-1","title":"Security update for ucode-intel","description":"This update for ucode-intel fixes the following issues:\n\n- Intel CPU Microcode was updated to the 20250812 release (bsc#1248438)\n     - CVE-2025-20109: Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel Processors may allow an authenticated user to potentially enable escalation of privilege via local access.\n     - CVE-2025-22840: Sequence of processor instructions leads to unexpected behavior for some Intel Xeon 6 Scalable processors may allow an authenticated user to potentially enable escalation of privilege via local access\n     - CVE-2025-22839: Insufficient granularity of access control in the OOB-MSM for some Intel Xeon 6 Scalable processors may allow a privileged user to potentially enable escalation of privilege via adjacent access.\n     - CVE-2025-22889: Improper handling of overlap between protected memory ranges for some Intel Xeon 6 processor with Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-20053: Improper buffer restrictions for some Intel Xeon Processor firmware with SGX enabled may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-26403: Out-of-bounds write in the memory subsystem for some Intel Xeon 6 processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - CVE-2025-32086: Improperly implemented security check for standard in the DDRIO configuration for some Intel Xeon 6 Processors when using Intel SGX or Intel TDX may allow a privileged user to potentially enable escalation of privilege via local access.\n     - Update for functional issues.\n     - Updated Platforms:\n\n  | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products\n  |:---------------|:---------|:------------|:---------|:---------|:---------\n  | ARL-H          | A1       | 06-c5-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n  | ARL-S/HX (8P)  | B0       | 06-c6-02/82 | 00000118 | 00000119 | Core Ultra Processor (Series 2)\n  | EMR-SP         | A1       | 06-cf-02/87 | 210002a9 | 210002b3 | Xeon Scalable Gen5\n  | GNR-AP/SP      | B0       | 06-ad-01/95 | 010003a2 | 010003d0 | Xeon Scalable Gen6\n  | GNR-AP/SP      | H0       | 06-ad-01/20 | 0a0000d1 | 0a000100 | Xeon Scalable Gen6\n  | ICL-D          | B0       | 06-6c-01/10 | 010002d0 | 010002e0 | Xeon D-17xx, D-27xx\n  | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d000404 | 0d000410 | Xeon Scalable Gen3\n  | LNL            | B0       | 06-bd-01/80 | 0000011f | 00000123 | Core Ultra 200 V Series Processor\n  | MTL            | C0       | 06-aa-04/e6 | 00000024 | 00000025 | Core™ Ultra Processor\n  | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004128 | 00004129 | Core Gen13\n  | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004128 | 00004129 | Core Gen13\n  | SPR-HBM        | Bx       | 06-8f-08/10 | 2c0003f7 | 2c000401 | Xeon Max\n  | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n  | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000639 | 2b000643 | Xeon Scalable Gen4\n  | SRF-SP         | C0       | 06-af-03/01 | 03000341 | 03000362 | Xeon 6700-Series Processors with E-Cores\n\n  New Disclosures Updated in Prior Releases:\n  All ADL, RPL, SPR, EMR, MTL, ARL Microcode patches previously released in May 2025.\n","status":"published","published":"2025-09-12T08:42:10Z","modified":"2026-03-23T04:50:14.83051Z","updated_at":"2026-11-02T15:53:59.92114Z"},{"id":"USN-7866-1","title":"intel-microcode vulnerabilities","description":"Barak Gross discovered that some Intel® Xeon® processors with SGX enabled\ndid not properly handle buffer restrictions. A local authenticated user\ncould potentially use this issue to escalate their privileges.\n(CVE-2025-20053)\n\nAvinash Maddy discovered that some Intel® processors did not properly\nisolate or compartmentalize the stream cache mechanisms. A local\nauthenticated user could potentially use this issue to escalate their\nprivileges. (CVE-2025-20109)\n\nJoseph Nuzman discovered that some Intel® Xeon® processors did not properly\nmanage references to active allocate resources. A local authenticated user\ncould potentially use this issue to cause a denial of service (system\ncrash). (CVE-2025-21090)\n\nIt was discovered that some Intel® Xeon® 6 processors did not properly\nprovide sufficient granularity of access control in the out of band\nmanagement service module (OOB-MSM). An authenticated user could\npotentially use this issue to escalate their privileges. (CVE-2025-22839)\n\nIt was discovered that some Intel® Xeon® 6 Scalable processors did not\nproperly handle a specific sequence of processor instructions, leading to\nunexpected behavior. A local authenticated user could potentially use this\nissue to escalate their privileges. (CVE-2025-22840)\n\nJoseph Nuzman discovered that some Intel® Xeon® 6 processors with Intel®\nTrust Domain Extensions (Intel® TDX) did not properly handle overlap\nbetween protected memory ranges. A local authenticated user could\npotentially use this issue to escalate their privileges. (CVE-2025-22889)\n\nAvraham Shalev discovered that some Intel® Xeon® processors did not\nproperly provide sufficient control flow management in the Alias Checking\nTrusted Module (ACTM) firmware. A local authenticated user could\npotentially use this issue to escalate their privileges. (CVE-2025-24305)\n\nAviv Eisen and Avraham Shalev discovered that some Intel® Xeon® 6\nprocessors when using Intel® SGX or Intel® TDX did not properly protect\nagainst out-of-bounds writes in the memory subsystem. A local authenticated\nuser could potentially use this issue to escalate their privileges.\n(CVE-2025-26403)\n\nAviv Eisen and Avraham Shalev discovered that some Intel® Xeon® 6\nprocessors when using Intel® SGX or Intel® TDX did not properly implement\nsecurity checks in the DDRIO configuration. A local authenticated user\ncould potentially use this issue to escalate their privileges.\n(CVE-2025-32086)","status":"published","published":"2025-11-10T20:11:08Z","modified":"2026-06-25T13:32:31.319219795Z","updated_at":"2026-11-02T16:58:21.91885Z"}]}}