microcode vulnerabilities (Mageia)
97 vulnerabilities.
microcodeMageiaInformation exposure through microarchitectural state after transient execution from some...6.5 MediummicrocodeMageiaProtection mechanism failure in some 3rd and 4th Generation Intel(R) Xeon(R) Processors when...6.1 MediummicrocodeMageiaSequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may...8.8 HighmicrocodeMageiaA side channel vulnerability on some of the AMD CPUs may allow an attacker to influence the...4.7 MediummicrocodeMageiaImproper access control in some 3rd Generation Intel(R) Xeon(R) Scalable processors may allow a...6.0 MediummicrocodeMageiaUnauthorized error injection in Intel(R) SGX or Intel(R) TDX for some Intel(R) Xeon(R) Processors...7.2 HighmicrocodeMageiaImportant: kernel security, bug fix, and enhancement update6.5 MediummicrocodeMageiaModerate: linux-firmware security update5.5 MediummicrocodeMageiaImproper isolation of shared resources in some Intel(R) Processors when using Intel(R) Software...6.0 MediummicrocodeMageiaIncorrect default permissions in some memory controller configurations for some Intel(R) Xeon(R)...7.2 HighmicrocodeMageiaIncorrect calculation in microcode keying mechanism for some 3rd Generation Intel(R) Xeon(R)...6.1 MediummicrocodeMageiaInsufficient granularity of access control in out-of-band management in some Intel(R) Atom and...7.5 HighmicrocodeMageiaCVE-2022-21233 does not affect BellSoft software5.5 MediummicrocodeMageiaProcessor optimization removal or modification of security-critical code for some Intel(R)...5.5 MediummicrocodeMageiaSensitive information accessible by physical probing of JTAG interface for some Intel(R)...2.4 LowmicrocodeMageiaImproper input validation for some Intel(R) Xeon(R) Processors may allow a privileged user to...5.5 MediummicrocodeMageiaImproper access control for some Intel(R) Xeon(R) Processors may allow an authenticated user to...5.5 MediummicrocodeMageiaOut of bounds read under complex microarchitectural condition in memory subsystem for some Intel...5.4 MediummicrocodeMageiaInsufficient control flow management in some Intel(R) Processors may allow an authenticated user...5.5 MediummicrocodeMageiaImproper initialization of shared resources in some Intel(R) Processors may allow an...5.5 MediummicrocodeMageiaHardware allows activation of test or debug logic at runtime for some Intel(R) processors which...6.8 MediummicrocodeMageiaDomain-bypass transient execution vulnerability in some Intel Atom(R) Processors may allow an...6.5 MediummicrocodeMageiaImproper isolation of shared resources in some Intel(R) Processors may allow an authenticated...6.5 MediummicrocodeMageiaIncomplete cleanup in some Intel(R) VT-d products may allow an authenticated user to potentially...8.8 HighmicrocodeMageiaImproper isolation of shared resources in some Intel(R) Processors may allow an authenticated...5.5 MediummicrocodeMageiaImproper removal of sensitive information before storage or transfer in some Intel(R) Processors...5.5 MediummicrocodeMageiaObservable discrepancy in the RAPL interface for some Intel(R) Processors may allow a privileged...5.5 MediummicrocodeMageiaInsufficient access control in the Linux kernel driver for some Intel(R) Processors may allow an...5.5 MediummicrocodeMageiaIncomplete cleanup from specific special register read operations in some Intel(R) Processors may...5.5 MediummicrocodeMageiaUpdated microcode packages fix security issuesNo scoremicrocodeMageiaCleanup errors in some data cache evictions for some Intel(R) Processors may allow an...5.5 MediummicrocodeMageiaCleanup errors in some Intel(R) Processors may allow an authenticated user to potentially enable...5.5 MediummicrocodeMageiaInsufficient access control in protected memory subsystem for Intel(R) SGX for 6th, 7th, 8th, 9th...4.4 MediummicrocodeMageiaImproper conditions check in the voltage modulation interface for some Intel(R) Xeon(R) Scalable...6.0 MediummicrocodeMageiaTSX Asynchronous Abort condition on some CPUs utilizing speculative execution may allow an...6.5 MediummicrocodeMageiaImproper invalidation for page table updates by a virtual guest operating system for multiple...6.5 MediummicrocodeMageiaSecure Encrypted Virtualization (SEV) on Advanced Micro Devices (AMD) Platform Security Processor...5.3 MediummicrocodeMageiaMicroarchitectural Data Sampling Uncacheable Memory (MDSUM): Uncacheable memory on some...5.6 MediummicrocodeMageiaMicroarchitectural Fill Buffer Data Sampling (MFBDS): Fill buffers on some microprocessors...5.6 MediummicrocodeMageiaMicroarchitectural Load Port Data Sampling (MLPDS): Load ports on some microprocessors utilizing...5.6 MediummicrocodeMageiaMicroarchitectural Store Buffer Data Sampling (MSBDS): Store buffers on some microprocessors...5.6 MediummicrocodeMageiaSystems with microprocessors utilizing speculative execution and address translations may allow...5.6 MediummicrocodeMageiaSystems with microprocessors utilizing speculative execution and address translations may allow...5.6 MediummicrocodeMageiaSystems with microprocessors utilizing speculative execution and Intel software guard extensions ...6.4 MediummicrocodeMageiaSystems with microprocessors utilizing speculative execution and that perform speculative reads...5.6 MediummicrocodeMageialinux-4.9 - security update5.5 MediummicrocodeMageiaImportant: kernel security, bug fix, and enhancement update5.6 Medium