intel-microcode vulnerabilities (Ubuntu)
103 vulnerabilities.
intel-microcodeUbuntuSequence of processor instructions leads to unexpected behavior for some Intel(R) Processors may...8.8 Highintel-microcodeUbuntuImproper access control in some 3rd Generation Intel(R) Xeon(R) Scalable processors may allow a...6.0 Mediumintel-microcodeUbuntuUnauthorized error injection in Intel(R) SGX or Intel(R) TDX for some Intel(R) Xeon(R) Processors...7.2 Highintel-microcodeUbuntuImportant: kernel security, bug fix, and enhancement update6.5 Mediumintel-microcodeUbuntuImproper isolation of shared resources in some Intel(R) Processors when using Intel(R) Software...6.0 Mediumintel-microcodeUbuntuIncorrect default permissions in some memory controller configurations for some Intel(R) Xeon(R)...7.2 Highintel-microcodeUbuntuIncorrect calculation in microcode keying mechanism for some 3rd Generation Intel(R) Xeon(R)...6.1 Mediumintel-microcodeUbuntuInsufficient granularity of access control in out-of-band management in some Intel(R) Atom and...7.5 Highintel-microcodeUbuntuCVE-2022-21233 does not affect BellSoft software5.5 Mediumintel-microcodeUbuntuModerate: kernel-rt security and bug fix update5.5 Mediumintel-microcodeUbuntuIncomplete cleanup in specific special register read operations for some Intel(R) Processors may...5.5 Mediumintel-microcodeUbuntuIncomplete cleanup of microarchitectural fill buffers on some Intel(R) Processors may allow an...5.5 Mediumintel-microcodeUbuntuIncomplete cleanup of multi-core shared buffers for some Intel(R) Processors may allow an...5.5 Mediumintel-microcodeUbuntuProcessor optimization removal or modification of security-critical code for some Intel(R)...5.5 Mediumintel-microcodeUbuntuImproper access control for some 3rd Generation Intel(R) Xeon(R) Scalable Processors before BIOS...5.5 Mediumintel-microcodeUbuntuOut of bounds read under complex microarchitectural condition in memory subsystem for some Intel...5.4 Mediumintel-microcodeUbuntuInsufficient control flow management in some Intel(R) Processors may allow an authenticated user...5.5 Mediumintel-microcodeUbuntuImproper initialization of shared resources in some Intel(R) Processors may allow an...5.5 Mediumintel-microcodeUbuntuHardware allows activation of test or debug logic at runtime for some Intel(R) processors which...6.8 Mediumintel-microcodeUbuntuDomain-bypass transient execution vulnerability in some Intel Atom(R) Processors may allow an...6.5 Mediumintel-microcodeUbuntuObservable timing discrepancy in some Intel(R) Processors may allow an authenticated user to...3.3 Lowintel-microcodeUbuntuImproper isolation of shared resources in some Intel(R) Processors may allow an authenticated...6.5 Mediumintel-microcodeUbuntuIncomplete cleanup in some Intel(R) VT-d products may allow an authenticated user to potentially...8.8 Highintel-microcodeUbuntuintel-microcode regressionNo scoreintel-microcodeUbuntuImproper isolation of shared resources in some Intel(R) Processors may allow an authenticated...5.5 Mediumintel-microcodeUbuntuImproper removal of sensitive information before storage or transfer in some Intel(R) Processors...5.5 Mediumintel-microcodeUbuntuObservable discrepancy in the RAPL interface for some Intel(R) Processors may allow a privileged...5.5 Mediumintel-microcodeUbuntuintel-microcode regressionNo scoreintel-microcodeUbuntuIncomplete cleanup from specific special register read operations in some Intel(R) Processors may...5.5 Mediumintel-microcodeUbuntuImproper data forwarding in some data cache for some Intel(R) Processors may allow an...5.6 Mediumintel-microcodeUbuntuCleanup errors in some data cache evictions for some Intel(R) Processors may allow an...5.5 Mediumintel-microcodeUbuntuCleanup errors in some Intel(R) Processors may allow an authenticated user to potentially enable...5.5 Mediumintel-microcodeUbuntuImproper conditions check in multiple Intel? Processors may allow an authenticated user to...5.3 Mediumintel-microcodeUbuntuImproper conditions check in voltage settings for some Intel(R) Processors may allow an...6.7 Mediumintel-microcodeUbuntuintel-microcode regressionNo scoreintel-microcodeUbuntuintel-microcode regressionNo scoreintel-microcodeUbuntuImproper conditions check in the voltage modulation interface for some Intel(R) Xeon(R) Scalable...6.0 Mediumintel-microcodeUbuntuTSX Asynchronous Abort condition on some CPUs utilizing speculative execution may allow an...6.5 Mediumintel-microcodeUbuntuMicroarchitectural Data Sampling Uncacheable Memory (MDSUM): Uncacheable memory on some...5.6 Mediumintel-microcodeUbuntuMicroarchitectural Fill Buffer Data Sampling (MFBDS): Fill buffers on some microprocessors...5.6 Mediumintel-microcodeUbuntuMicroarchitectural Load Port Data Sampling (MLPDS): Load ports on some microprocessors utilizing...5.6 Mediumintel-microcodeUbuntuMicroarchitectural Store Buffer Data Sampling (MSBDS): Store buffers on some microprocessors...5.6 Mediumintel-microcodeUbuntuImproper certificate validation in Platform Sample/ Silicon Reference firmware for 8th Generation...6.8 Mediumintel-microcodeUbuntuImproper memory initialization in Platform Sample/Silicon Reference firmware Intel(R) Server...6.7 Mediumintel-microcodeUbuntuDenial of service vulnerability in Platform Sample/ Silicon Reference firmware for 8th Generation...6.7 Mediumintel-microcodeUbuntuPrivilege escalation vulnerability in Platform Sample/ Silicon Reference firmware for 8th...6.7 Mediumintel-microcodeUbuntuBuffer overflow vulnerability in Platform Sample / Silicon Reference firmware for 8th Generation...6.7 Mediumintel-microcodeUbuntuSystems with microprocessors utilizing speculative execution and address translations may allow...5.6 Mediumintel-microcodeUbuntuSystems with microprocessors utilizing speculative execution and branch prediction may allow...5.6 Mediumintel-microcodeUbuntuSystems with microprocessors utilizing speculative execution and that perform speculative reads...5.6 Medium- Show moreLoading…